diff options
| author | Marshall Dawson <marshalldawson3rd@gmail.com> | 2018-01-24 21:00:55 -0700 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2018-01-26 22:38:05 +0000 |
| commit | 50cc53d0a9189ad6c58a5160676703a7f2853ef5 (patch) | |
| tree | 321fe7a27bb58f08bccb2910a901c1e58484a0ac /src/soc/amd/stoneyridge/include | |
| parent | 7539b8c3914ca949b2cb1172f3c9c539cee48d4b (diff) | |
amd/stoneyridge: Convert BiosRam access to MMIO
Change the BiosRam read/write functions to use the fixed MMIO range at
0xfed80500. This is faster than two accesses per byte when using I/O
0xcd4/0xcd5.
Note that BiosRam may only be accessed byte-by-byte. It does not decode
normally.
Change-Id: I9d8baf2bd5d9d48a87bddfb6a0b86e292a8fdf7d
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-on: https://review.coreboot.org/23436
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/soc/amd/stoneyridge/include')
| -rw-r--r-- | src/soc/amd/stoneyridge/include/soc/iomap.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/amd/stoneyridge/include/soc/iomap.h b/src/soc/amd/stoneyridge/include/soc/iomap.h index 72a1e8c6f5..ccedcce7b4 100644 --- a/src/soc/amd/stoneyridge/include/soc/iomap.h +++ b/src/soc/amd/stoneyridge/include/soc/iomap.h @@ -36,6 +36,7 @@ #define AMD_SB_ACPI_MMIO_ADDR 0xfed80000 #define APU_SMI_BASE 0xfed80200 #define PM_MMIO_BASE 0xfed80300 +#define BIOSRAM_MMIO_BASE 0xfed80500 #define XHCI_ACPI_PM_MMIO_BASE 0xfed81c00 #define APU_UART0_BASE 0xfedc6000 #define APU_UART1_BASE 0xfedc8000 |