diff options
| author | Marshall Dawson <marshalldawson3rd@gmail.com> | 2017-09-13 17:47:31 -0600 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2017-09-27 16:26:40 +0000 |
| commit | b617211910e9c6ff4e3cd92f022ef052a65559a3 (patch) | |
| tree | efd458f6fc7f5c4d66df78938f8c9c3767f6783e /src/soc/amd/stoneyridge/include | |
| parent | f7bcc180eb5aa297aa3e8ff9a3968414a238395a (diff) | |
amd/stoneyridge: Enable SMM in TSEG
Add necessary features to allow mp_init_with_smm() to install and
relocate an SMM handler.
SMM region functions are added to easily identify the SMM attributes.
Adjust the neighboring cbmem_top() rounding downward to better reflect
the default TSEG size. Add relocation attributes to be set by each
core a relocation handler.
Modify the definition of smi_southbridge_handler() to match TSEG
prototype.
BUG=b:62103112
Change-Id: I4dc03ed27d0d109ab919a4f0861de9c7420d03ce
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-on: https://review.coreboot.org/21501
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/soc/amd/stoneyridge/include')
| -rw-r--r-- | src/soc/amd/stoneyridge/include/soc/northbridge.h | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/src/soc/amd/stoneyridge/include/soc/northbridge.h b/src/soc/amd/stoneyridge/include/soc/northbridge.h index 7e9b51aa31..f952186d22 100644 --- a/src/soc/amd/stoneyridge/include/soc/northbridge.h +++ b/src/soc/amd/stoneyridge/include/soc/northbridge.h @@ -2,6 +2,7 @@ * This file is part of the coreboot project. * * Copyright (C) 2015 Advanced Micro Devices, Inc. + * Copyright (C) 2015 Intel Corp. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -30,6 +31,27 @@ # define DRAM_HOIST_VALID (1 << 1) # define DRAM_HOLE_VALID (1 << 0) +enum { + /* SMM handler area. */ + SMM_SUBREGION_HANDLER, + /* SMM cache region. */ + SMM_SUBREGION_CACHE, + /* Chipset specific area. */ + SMM_SUBREGION_CHIPSET, + /* Total sub regions supported. */ + SMM_SUBREGION_NUM, +}; + +/* + * Fills in the arguments for the entire SMM region covered by chipset + * protections. e.g. TSEG. + */ +void smm_region_info(void **start, size_t *size); +/* + * Fills in the start and size for the requested SMM subregion. Returns + * 0 on susccess, < 0 on failure. + */ +int smm_subregion(int sub, void **start, size_t *size); void domain_enable_resources(device_t dev); void domain_read_resources(device_t dev); void domain_set_resources(device_t dev); |