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authorVadim Bendebury <vbendeb@chromium.org>2017-10-25 15:45:00 -0700
committerVadim Bendebury <vbendeb@chromium.org>2017-11-01 18:02:43 +0000
commit9a506d5c9ae60a368df924d70cd1bbae303f3a9e (patch)
tree99a3318d12d253c115302330e4fa64c3fcb915e4 /src/soc/amd/stoneyridge/include
parentd2c636582d6e1f5f8afda495081358e22a0f120f (diff)
spi/tpm: Make sure AP properly syncs up with Cr50
When Cr50 TPM is being reset, it continues replying to the SPI bus requests, sends wrong register values in response to read requests. This patch makes sure that the TPM driver does not proceed unless proper value is read from the TPM device identification register. If the read value is still wrong after 10 retries taken with 10 ms intervals, the driver gives up and declares TPM broken/unavailable. BRANCH=cr50 BUG=b:68012381 TEST=ran a script resetting the Fizz device as soon as the "index 0x1007 return code 0" string shows up in the AP console output. The script keeps rebooting the Fizz indefinitely, before this script Fizz would fail to read TPM properly and fall into recovery after no more than four reboots. Change-Id: I7e67ec62c2bf31077b9ae558e09214d07eccf96b Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://review.coreboot.org/22231 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/amd/stoneyridge/include')
0 files changed, 0 insertions, 0 deletions