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authorFelix Held <felix-coreboot@felixheld.de>2022-10-18 20:52:42 +0200
committerFelix Held <felix-coreboot@felixheld.de>2022-10-20 16:47:11 +0000
commit8ebdbbc3cb0aaca6581a7ba0a3ad92784ed502df (patch)
tree0b5f46981ea76cc9a99ac65fa05505d058ef831b /src/soc/amd/stoneyridge/include
parentba35f3582e95fdc3d9313a63d6ee0072283f5c7f (diff)
soc/amd: move set_uart_config prototype to common UART header
Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I97860292fd3cd0330fec40edb31089cd6608906b Reviewed-on: https://review.coreboot.org/c/coreboot/+/68560 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
Diffstat (limited to 'src/soc/amd/stoneyridge/include')
-rw-r--r--src/soc/amd/stoneyridge/include/soc/southbridge.h2
1 files changed, 0 insertions, 2 deletions
diff --git a/src/soc/amd/stoneyridge/include/soc/southbridge.h b/src/soc/amd/stoneyridge/include/soc/southbridge.h
index 26500efd04..616a6afe79 100644
--- a/src/soc/amd/stoneyridge/include/soc/southbridge.h
+++ b/src/soc/amd/stoneyridge/include/soc/southbridge.h
@@ -183,8 +183,6 @@ void fch_final(void *chip_info);
void fch_clk_output_48Mhz(u32 osc);
-void set_uart_config(unsigned int idx);
-
/*
* Call the mainboard to get the USB Over Current Map. The mainboard
* returns the map and 0 on Success or -1 on error or no map. There is