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author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2020-06-18 19:18:21 +0300 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2020-06-29 15:49:54 +0000 |
commit | 39bd46f4a4f3c1cc76f1007f82050c943fd09bb5 (patch) | |
tree | a3f3aa4016b8ac0793ed5bccd7c5b26ed474592d /src/soc/amd/stoneyridge/include | |
parent | 9f6622fb5588a9322b7f1c71bc198d0c2e1dd1bf (diff) |
soc/amd/common: Drop ACPIMMIO GPIO bank separation
The banks are one after each other in the ACPIMMIO space. Also
there is space for more banks and existing ASL takes advantage
of the property.
Change-Id: Ib78559a60b5c20d53a60e1726ee2aad1f38f78ce
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42522
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Martin Roth <martinroth@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/amd/stoneyridge/include')
-rw-r--r-- | src/soc/amd/stoneyridge/include/soc/i2c.h | 5 |
1 files changed, 0 insertions, 5 deletions
diff --git a/src/soc/amd/stoneyridge/include/soc/i2c.h b/src/soc/amd/stoneyridge/include/soc/i2c.h index 874f7d1565..844ff1bf2d 100644 --- a/src/soc/amd/stoneyridge/include/soc/i2c.h +++ b/src/soc/amd/stoneyridge/include/soc/i2c.h @@ -21,11 +21,6 @@ struct soc_amd_i2c_save { #define I2C2_SCL_PIN GPIO_113 #define I2C3_SCL_PIN GPIO_19 -#define GPIO_I2C0_ADDRESS GPIO_BANK2_CONTROL(I2C0_SCL_PIN) -#define GPIO_I2C1_ADDRESS GPIO_BANK2_CONTROL(I2C1_SCL_PIN) -#define GPIO_I2C2_ADDRESS GPIO_BANK1_CONTROL(I2C2_SCL_PIN) -#define GPIO_I2C3_ADDRESS GPIO_BANK0_CONTROL(I2C3_SCL_PIN) - #define I2C0_SCL_PIN_IOMUX_GPIOxx GPIO_145_IOMUX_GPIOxx #define I2C1_SCL_PIN_IOMUX_GPIOxx GPIO_147_IOMUX_GPIOxx #define I2C2_SCL_PIN_IOMUX_GPIOxx GPIO_113_IOMUX_GPIOxx |