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authorRichard Spiegel <richard.spiegel@amd.corp-partner.google.com>2018-10-16 15:04:14 -0700
committerPatrick Georgi <pgeorgi@google.com>2018-10-18 12:48:25 +0000
commit63405dacb73f9950e082ff88b79f472741c87b75 (patch)
treed36e7dbf12f035724f41b1c0c21070ce242e590e /src/soc/amd/stoneyridge/gpio.c
parent543e01a29c01b634d61f3dee669f0ac44b7550a5 (diff)
soc/amd/stoneyridge: Remove double defined GPIO MMIO bases
GPIO control a mux base addresses are defined within MMIO definitions and again bellow as GPIO specific base addresses. Eliminate those outside MMIO bases. Rename them to something indicating that they are both MMIO and related to GPIO. BUG=b:117754420 TEST=Build grunt. Change-Id: I53f7cf17d6267e6f8daa650b5f864bab688dc3f0 Signed-off-by: Richard Spiegel <richard.spiegel@silverbackltd.com> Reviewed-on: https://review.coreboot.org/29156 Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/amd/stoneyridge/gpio.c')
-rw-r--r--src/soc/amd/stoneyridge/gpio.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/src/soc/amd/stoneyridge/gpio.c b/src/soc/amd/stoneyridge/gpio.c
index cc54f2c82d..3eaa3a03c8 100644
--- a/src/soc/amd/stoneyridge/gpio.c
+++ b/src/soc/amd/stoneyridge/gpio.c
@@ -237,7 +237,7 @@ void sb_program_gpios(const struct soc_amd_gpio *gpio_list_ptr, size_t size)
control = gpio_list_ptr[index].control;
control_flags = gpio_list_ptr[index].flags;
- mux_ptr = (uint8_t *)(uintptr_t)(gpio + AMD_GPIO_MUX);
+ mux_ptr = (uint8_t *)(uintptr_t)(gpio + GPIO_IOMUX_MMIO_BASE);
write8(mux_ptr, mux & AMD_GPIO_MUX_MASK);
read8(mux_ptr); /* Flush posted write */
/* special case if pin 2 is assigned to wake */
@@ -323,7 +323,7 @@ static void save_i2c_pin_registers(uint8_t gpio,
uint32_t *gpio_ptr;
uint8_t *mux_ptr;
- mux_ptr = (uint8_t *)(uintptr_t)(gpio + AMD_GPIO_MUX);
+ mux_ptr = (uint8_t *)(uintptr_t)(gpio + GPIO_IOMUX_MMIO_BASE);
gpio_ptr = (uint32_t *)gpio_get_address(gpio);
save_table->mux_value = read8(mux_ptr);
save_table->control_value = read32(gpio_ptr);
@@ -335,7 +335,7 @@ static void restore_i2c_pin_registers(uint8_t gpio,
uint32_t *gpio_ptr;
uint8_t *mux_ptr;
- mux_ptr = (uint8_t *)(uintptr_t)(gpio + AMD_GPIO_MUX);
+ mux_ptr = (uint8_t *)(uintptr_t)(gpio + GPIO_IOMUX_MMIO_BASE);
gpio_ptr = (uint32_t *)gpio_get_address(gpio);
write8(mux_ptr, save_table->mux_value);
read8(mux_ptr);