soc/amd/stoneyridge: Add functions for GPIO interrupts

Add a function to configure interrupt settings for a GPIO.  This does
not currently configure GEVENT signals.

The second function returns the GPIO interrupt status and clears the
flag if set.

BUG=b:72838769
BRANCH=none
TEST=Update and test interrupt settings for GPIO_9 on grunt

Change-Id: I1addd3abcb6a57d916b1c93480bacb0450abddf2
Signed-off-by: Chris Ching <chingcodes@chromium.org>
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/23624
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>

1 files changed, 29 insertions, 0 deletions

diff --git a/src/soc/amd/stoneyridge/gpio.c b/src/soc/amd/stoneyridge/gpio.c
index 59f283ed5c..088f1990d5 100644
--- a/src/soc/amd/stoneyridge/gpio.c
+++ b/src/soc/amd/stoneyridge/gpio.c
@@ -106,3 +106,32 @@ uint16_t gpio_acpi_pin(gpio_t gpio)
 {
 	return gpio;
 }
+
+void gpio_set_interrupt(gpio_t gpio, uint32_t flags)
+{
+	uintptr_t gpio_address = gpio_get_address(gpio);
+	uint32_t reg = read32((void *)gpio_address);
+
+	/* Clear registers that are being updated */
+	reg &= ~(GPIO_TRIGGER_MASK | GPIO_ACTIVE_MASK | GPIO_INTERRUPT_MASK);
+
+	/* Clear any extra bits in the flags */
+	flags &= (GPIO_TRIGGER_MASK | GPIO_ACTIVE_MASK | GPIO_INTERRUPT_MASK);
+
+	write32((void *)gpio_address, reg | flags);
+}
+
+int gpio_interrupt_status(gpio_t gpio)
+{
+	uintptr_t gpio_address = gpio_get_address(gpio);
+	uint32_t reg = read32((void *)gpio_address);
+
+	if (reg & GPIO_INT_STATUS) {
+		/* Clear interrupt status, preserve wake status */
+		reg &= ~GPIO_WAKE_STATUS;
+		write32((void *)gpio_address, reg);
+		return 1;
+	}
+
+	return 0;
+}