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authorElyes HAOUAS <ehaouas@noos.fr>2018-10-12 10:54:30 +0200
committerPatrick Georgi <pgeorgi@google.com>2018-10-18 12:51:26 +0000
commit400ce55566caa541304b2483e61bcc2df941998c (patch)
tree4e0cbf4aef7fb00a9c40327075ffa9737e56b104 /src/soc/amd/stoneyridge/finalize.c
parente64a585374de88ea896ed517445a34986aa321b9 (diff)
cpu/amd: Use common AMD's MSR
Phase 1. Due to the size of the effort, this CL is broken into several phases. Change-Id: I0236e0960cd1e79558ea50c814e1de2830aa0550 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/29065 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Richard Spiegel <richard.spiegel@silverbackltd.com>
Diffstat (limited to 'src/soc/amd/stoneyridge/finalize.c')
-rw-r--r--src/soc/amd/stoneyridge/finalize.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/src/soc/amd/stoneyridge/finalize.c b/src/soc/amd/stoneyridge/finalize.c
index 21d203cdd2..45e659504b 100644
--- a/src/soc/amd/stoneyridge/finalize.c
+++ b/src/soc/amd/stoneyridge/finalize.c
@@ -15,7 +15,7 @@
#include <cpu/x86/mp.h>
#include <cpu/x86/msr.h>
-#include <cpu/amd/amdfam15.h>
+#include <cpu/amd/msr.h>
#include <bootstate.h>
#include <timer.h>
#include <console/console.h>
@@ -30,9 +30,9 @@ static void per_core_finalize(void *unused)
return;
if (IS_ENABLED(CONFIG_SMM_TSEG)) {
- mask = rdmsr(MSR_SMM_MASK);
+ mask = rdmsr(SMM_MASK_MSR);
mask.lo |= SMM_TSEG_VALID;
- wrmsr(MSR_SMM_MASK, mask);
+ wrmsr(SMM_MASK_MSR, mask);
}
hwcr.lo |= SMM_LOCK;