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| author | Felix Held <felix-coreboot@felixheld.de> | 2023-07-26 17:53:24 +0200 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2023-07-27 16:02:19 +0000 |
| commit | 2cb2b185dac1fd836e0ca9d84b25bf705131ed09 (patch) | |
| tree | c5039e03d0bff8ea64aa518c0169480c490996b8 /src/soc/amd/stoneyridge/chip.h | |
| parent | f3cdd0110da9b13c38ede5ad0a9cdebef7ae0622 (diff) | |
soc/amd/noncar/memmap.c: Support non-FSP use cases
Without FSP we assume TSEG is right above CBMEM.
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I8700803617c3fe4890e497c6d7b94f1d36e21cb4
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76472
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Martin L Roth <gaumless@gmail.com>
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/amd/stoneyridge/chip.h')
0 files changed, 0 insertions, 0 deletions