soc: Add AMD Stoney Ridge southbridge code

Copy the Hudson/Kern code from southbridge/amd/pi/hudson.  This
is the first of a series of patches to migrate Stoney Ridge
support from cpu, northbridge, and southbridge to soc/

Changes:
- add soc/amd/stoneyridge and soc/amd/common
- remove all other Husdon versions
- update include paths, etc
- clean up Kconfig and Makefile
- create chip.c to contain chip_ops

Change-Id: Ib88a868e654ad127be70ecc506f6b90b784f8d1b
Signed-off-by: Marc Jones <marcj303@gmail.com>
Reviewed-on: https://review.coreboot.org/19722
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>

1 files changed, 33 insertions, 0 deletions

diff --git a/src/soc/amd/stoneyridge/chip.h b/src/soc/amd/stoneyridge/chip.h
new file mode 100644
index 0000000000..9dd4997931
--- /dev/null
+++ b/src/soc/amd/stoneyridge/chip.h
@@ -0,0 +1,33 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2010 Advanced Micro Devices, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef STONEYRIDGE_CHIP_H
+#define STONEYRIDGE_CHIP_H
+
+#include <stdint.h>
+
+struct soc_amd_stoneyridge_config
+{
+	u32 ide0_enable : 1;
+	u32 sata0_enable : 1;
+	u32 boot_switch_sata_ide : 1;
+	u32 hda_viddid;
+	u8  gpp_configuration;
+	u8  sd_mode;
+};
+
+typedef struct soc_amd_stoneyridge_config config_t;
+
+#endif /* STONEYRIDGE_CHIP_H */