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| author | Raul E Rangel <rrangel@chromium.org> | 2021-02-05 16:48:42 -0700 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2021-02-10 21:46:54 +0000 |
| commit | 72616b3813382d8eeaaf97d86ebc90e784c5bad5 (patch) | |
| tree | 2d04efd78b133e1a8996b4f074692eb7c0b2c807 /src/soc/amd/stoneyridge/chip.c | |
| parent | a634257f13ad1e6cb915a2921b9fa6d43eece7d0 (diff) | |
soc/amd/cezanne: Add verstage support
Setup the config required to support verstage.
The offsets are the same as picasso.
Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Change-Id: I82874d649db3c9c370e32841e6a9898efb70082e
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50342
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/soc/amd/stoneyridge/chip.c')
0 files changed, 0 insertions, 0 deletions