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authorFelix Held <felix-coreboot@felixheld.de>2022-11-22 17:05:05 +0100
committerFelix Held <felix-coreboot@felixheld.de>2022-11-23 19:44:03 +0000
commit75873dbf27c3ae786c93b7bc55d40ea386441903 (patch)
tree629a7643eed92c6f8edfda1174cb0e918f1515a5 /src/soc/amd/stoneyridge/chip.c
parent3b89c959061f878d96b7ae7b88c3a1386489a1b8 (diff)
soc/amd/*/fsp_m_params: rework local USB PHY table update
Update the fields that need to be updated directly in the local static usb_phy_config struct instead of dereferencing the pointer written to the corresponding UPD field. This will allow updating the type of UPD field in a follow-up commit to enable 64 bit coreboot builds. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I44a9fe719e6803fc957fee3db13b261489ed313d Reviewed-on: https://review.coreboot.org/c/coreboot/+/69896 Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
Diffstat (limited to 'src/soc/amd/stoneyridge/chip.c')
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