diff options
| author | Richard Spiegel <richard.spiegel@amd.corp-partner.google.com> | 2018-03-15 15:45:44 -0700 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2018-03-19 14:19:46 +0000 |
| commit | 6dfbb593077ea3edb9162431c2380a268d35fc4a (patch) | |
| tree | af60b48533a4a0c07140d42e96d8c561c152163a /src/soc/amd/stoneyridge/bootblock | |
| parent | 6bff3bf4be7fd94e6ffd080e498bbe75c75418d9 (diff) | |
soc/amd/stoneyridge/southbridge.c: Remove configure_stoneyridge_uart
The GPIO programming of configure_stoneyridge_UART() can be done by the early
GPIO table, AOAC enabling was already removed. So configure_stoneyridge_uart()
became redundant. Remove procedure configure_stoneyridge_uart().
BUG=b:74258015
TEST=Build and boot kahlee, observing serial output does not changes from
previous serial output.
Change-Id: Ie67051d7b90fa294090f6bfc518c6c074d98cc98
Signed-off-by: Richard Spiegel <richard.spiegel@silverbackltd.com>
Reviewed-on: https://review.coreboot.org/25192
Reviewed-by: Garrett Kirkendall <garrett.kirkendall@amd.corp-partner.google.com>
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/amd/stoneyridge/bootblock')
| -rw-r--r-- | src/soc/amd/stoneyridge/bootblock/bootblock.c | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/src/soc/amd/stoneyridge/bootblock/bootblock.c b/src/soc/amd/stoneyridge/bootblock/bootblock.c index 3eff5eb0dc..fafaf079ce 100644 --- a/src/soc/amd/stoneyridge/bootblock/bootblock.c +++ b/src/soc/amd/stoneyridge/bootblock/bootblock.c @@ -75,8 +75,6 @@ void bootblock_soc_early_init(void) bootblock_fch_early_init(); post_code(0x90); - if (CONFIG_STONEYRIDGE_UART) - configure_stoneyridge_uart(); } /* |