amd/stoneyridge: Add ASL helper for AOAC PwrGood Control

Add a method to assist with setting the PwrGood Control register, which
will be useful for various devices.

BUG=b:77602074

Change-Id: Ief602c4bc42d27b3e236d24db815b990f3a2419c
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-on: https://review.coreboot.org/28771
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Richard Spiegel <richard.spiegel@silverbackltd.com>
Reviewed-by: Martin Roth <martinroth@google.com>

1 files changed, 25 insertions, 0 deletions

diff --git a/src/soc/amd/stoneyridge/acpi/sb_pci0_fch.asl b/src/soc/amd/stoneyridge/acpi/sb_pci0_fch.asl
index b8956b4984..e875f43f40 100644
--- a/src/soc/amd/stoneyridge/acpi/sb_pci0_fch.asl
+++ b/src/soc/amd/stoneyridge/acpi/sb_pci0_fch.asl
@@ -639,3 +639,28 @@ Method(FWAK,0, Serialized)  /* FCH _WAK */
 		}
 	}
 }
+
+/*
+ * Helper for setting a bit in AOACxA0 PwrGood Control
+ * Arg0: bit to set or clear
+ * Arg1: 0 = clear bit[Arg0], non-zero = set bit[Arg0]
+ */
+Method(PWGC,2, Serialized)
+{
+	And (PGA3, 0xdf, Local0)  /* do SwUsb3SlpShutdown below */
+	if(Arg1) {
+		Or(Arg0, Local0, Local0)
+	} else {
+		Not(Arg0, Local1)
+		And(Local1, Local0, Local0)
+	}
+	Store(Local0, PGA3)
+	if(LEqual(Arg0, 0x20)) { /* if SwUsb3SlpShutdown */
+		Store(PGA3, Local0)
+		And(Arg0, Local0, Local0)
+		while(LNot(Local0)) { /* wait SwUsb3SlpShutdown to complete */
+			Store(PGA3, Local0)
+			And(Arg0, Local0, Local0)
+		}
+	}
+}