diff options
author | Felix Held <felix-coreboot@felixheld.de> | 2020-11-14 01:58:47 +0100 |
---|---|---|
committer | Felix Held <felix-coreboot@felixheld.de> | 2020-11-21 19:40:20 +0000 |
commit | ea3402213ff4b80bf8ebfb8502e49aa071cf3d74 (patch) | |
tree | 993432c5d1f0d59f3324b0ffcee57e87db053152 /src/soc/amd/stoneyridge/Makefile.inc | |
parent | 65d9a7ae3116b636f6fa75311a1fb648d944f91b (diff) |
soc/amd: factor out vbnv_cmos_failed() into soc/amd/common/vboot
Change-Id: I7f976c6c5a2a715e1a5372bb93fe657d0d86c848
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47584
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/amd/stoneyridge/Makefile.inc')
-rw-r--r-- | src/soc/amd/stoneyridge/Makefile.inc | 4 |
1 files changed, 0 insertions, 4 deletions
diff --git a/src/soc/amd/stoneyridge/Makefile.inc b/src/soc/amd/stoneyridge/Makefile.inc index fb0a45bd65..311ea6886b 100644 --- a/src/soc/amd/stoneyridge/Makefile.inc +++ b/src/soc/amd/stoneyridge/Makefile.inc @@ -17,7 +17,6 @@ bootblock-y += gpio.c bootblock-y += i2c.c bootblock-y += enable_usbdebug.c bootblock-y += monotonic_timer.c -bootblock-y += pmutil.c bootblock-y += tsc_freq.c bootblock-y += southbridge.c bootblock-$(CONFIG_HAVE_SMI_HANDLER) += smi_util.c @@ -28,7 +27,6 @@ romstage-y += romstage.c romstage-y += enable_usbdebug.c romstage-y += gpio.c romstage-y += monotonic_timer.c -romstage-y += pmutil.c romstage-y += smbus_spd.c romstage-y += memmap.c romstage-$(CONFIG_STONEYRIDGE_UART) += uart.c @@ -40,7 +38,6 @@ romstage-y += psp.c verstage-y += gpio.c verstage-y += i2c.c verstage-y += monotonic_timer.c -verstage-y += pmutil.c verstage-$(CONFIG_STONEYRIDGE_UART) += uart.c verstage-y += tsc_freq.c @@ -61,7 +58,6 @@ ramstage-y += gpio.c ramstage-y += monotonic_timer.c ramstage-y += southbridge.c ramstage-y += northbridge.c -ramstage-y += pmutil.c ramstage-y += sata.c ramstage-y += memmap.c ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smi.c |