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authorRichard Spiegel <richard.spiegel@amd.corp-partner.google.com>2018-04-04 10:35:21 -0700
committerMartin Roth <martinroth@google.com>2018-04-10 17:09:22 +0000
commit6d61db0d2cec4a3b141da77bcf5675b8b154c8b7 (patch)
tree8e2d52d4603121327fad16fee5f929e80dd35f60 /src/soc/amd/stoneyridge/Makefile.inc
parent09a16e6a323e16b0428c4cbd3beae38d394aa91e (diff)
soc/amd/stoneyridege: Create AP jump structure
As part of moving AGESA calls from bootblock to romstage, create infrastructure to pass a pointer to the AP cores, so they can jump directly to romstage. BUG=b:74236170 TEST=Build and boot grunt, actual test will be performed at a later patch. Change-Id: If716d1c1970746f2ad90ef71ae9062c99f219897 Signed-off-by: Richard Spiegel <richard.spiegel@silverbackltd.com> Reviewed-on: https://review.coreboot.org/25526 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/amd/stoneyridge/Makefile.inc')
-rw-r--r--src/soc/amd/stoneyridge/Makefile.inc7
1 files changed, 6 insertions, 1 deletions
diff --git a/src/soc/amd/stoneyridge/Makefile.inc b/src/soc/amd/stoneyridge/Makefile.inc
index 61704eaca6..31dc439397 100644
--- a/src/soc/amd/stoneyridge/Makefile.inc
+++ b/src/soc/amd/stoneyridge/Makefile.inc
@@ -48,7 +48,7 @@ bootblock-y += reset.c
bootblock-y += sb_util.c
bootblock-y += tsc_freq.c
bootblock-y += southbridge.c
-bootblock-y += sb_util.c
+bootblock-y += nb_util.c
romstage-y += BiosCallOuts.c
romstage-y += i2c.c
@@ -66,6 +66,7 @@ romstage-y += ramtop.c
romstage-$(CONFIG_STONEYRIDGE_UART) += uart.c
romstage-y += tsc_freq.c
romstage-y += southbridge.c
+romstage-y += nb_util.c
verstage-y += gpio.c
verstage-y += i2c.c
@@ -75,11 +76,13 @@ verstage-y += pmutil.c
verstage-y += reset.c
verstage-$(CONFIG_STONEYRIDGE_UART) += uart.c
verstage-y += tsc_freq.c
+verstage-y += nb_util.c
postcar-y += monotonic_timer.c
postcar-$(CONFIG_STONEYRIDGE_UART) += uart.c
postcar-y += ramtop.c
postcar-y += sb_util.c
+postcar-y += nb_util.c
ramstage-y += BiosCallOuts.c
ramstage-y += i2c.c
@@ -108,6 +111,7 @@ ramstage-y += usb.c
ramstage-y += tsc_freq.c
ramstage-$(CONFIG_SPI_FLASH) += spi.c
ramstage-y += finalize.c
+ramstage-y += nb_util.c
smm-y += monotonic_timer.c
smm-y += smihandler.c
@@ -116,6 +120,7 @@ smm-y += sb_util.c
smm-y += tsc_freq.c
smm-$(CONFIG_DEBUG_SMI) += uart.c
smm-$(CONFIG_SPI_FLASH) += spi.c
+smm-y += nb_util.c
CPPFLAGS_common += -I$(src)/soc/amd/stoneyridge
CPPFLAGS_common += -I$(src)/soc/amd/stoneyridge/include