diff options
| author | Marc Jones <marcj303@gmail.com> | 2017-05-07 16:47:36 -0600 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2017-06-26 00:46:03 +0000 |
| commit | 21cde8b83227fa324f246672b1e2d58408ea6bf8 (patch) | |
| tree | b5c0ce8fd9426def5d0e8863265840c891fb1076 /src/soc/amd/stoneyridge/Makefile.inc | |
| parent | 244848462def7075e0c812a2f71c408668cacfe4 (diff) | |
soc/amd/stoneyridge: Add CPU files
Copy cpu/amd/pi/00670F00 to soc/amd/stoneyridge and
soc/amd/common. This is the second patch in the process of
converting Stoney Ridge to soc/.
Changes:
- update Kconfig and Makefiles
- update vendorcode/amd for new soc/ path
Change-Id: I8b6b1991372c2c6a02709777a73615a86e78ac26
Signed-off-by: Marc Jones <marcj303@gmail.com>
Reviewed-on: https://review.coreboot.org/19723
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/soc/amd/stoneyridge/Makefile.inc')
| -rw-r--r-- | src/soc/amd/stoneyridge/Makefile.inc | 15 |
1 files changed, 13 insertions, 2 deletions
diff --git a/src/soc/amd/stoneyridge/Makefile.inc b/src/soc/amd/stoneyridge/Makefile.inc index 7c2682c9bd..9214488fc7 100644 --- a/src/soc/amd/stoneyridge/Makefile.inc +++ b/src/soc/amd/stoneyridge/Makefile.inc @@ -27,10 +27,19 @@ # SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. # #***************************************************************************** -ifeq ($(CONFIG_SOC_AMD_STONEYRIDGE),y) +ifeq ($(CONFIG_SOC_AMD_STONEYRIDGE_FP4)$(CONFIG_SOC_AMD_STONEYRIDGE_FT4),y) + +subdirs-y += ../../../cpu/amd/mtrr/ +subdirs-y += ../../../cpu/x86/tsc +subdirs-y += ../../../cpu/x86/lapic +subdirs-y += ../../../cpu/x86/cache +subdirs-y += ../../../cpu/x86/mtrr +subdirs-y += ../../../cpu/x86/pae +subdirs-y += ../../../cpu/x86/smm romstage-y += early_setup.c romstage-$(CONFIG_USBDEBUG_IN_ROMSTAGE) += enable_usbdebug.c +romstage-y += fixme.c romstage-$(CONFIG_STONEYRIDGE_IMC_FWM) += imc.c romstage-y += smbus.c romstage-y += smbus_spd.c @@ -39,12 +48,14 @@ romstage-$(CONFIG_STONEYRIDGE_UART) += uart.c ramstage-y += chip.c ramstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c ramstage-$(CONFIG_HAVE_ACPI_TABLES) += fadt.c +ramstage-y += fixme.c ramstage-y += gpio.c ramstage-y += hda.c ramstage-y += hudson.c ramstage-y += ide.c ramstage-$(CONFIG_STONEYRIDGE_IMC_FWM) += imc.c ramstage-y += lpc.c +ramstage-y += model_15_init.c ramstage-y += pci.c ramstage-y += pcie.c ramstage-y += reset.c @@ -233,4 +244,4 @@ apu/amdfw-type := raw endif # ifeq ($(CONFIG_AMDFW_OUTSIDE_CBFS),y) -endif +endif # ($(CONFIG_SOC_AMD_STONEYRIDGE_FP4)$(CONFIG_SOC_AMD_STONEYRIDGE_FT4),y) |