diff options
| author | Jon Murphy <jpmurphy@google.com> | 2022-06-29 11:56:20 -0600 |
|---|---|---|
| committer | Raul Rangel <rrangel@chromium.org> | 2022-07-06 15:06:19 +0000 |
| commit | d4e07090ffb3420f5aa11d8a92dd61c8074412b4 (patch) | |
| tree | 85da63e6cba7f9fe9c8515d0076e7c78e55056ff /src/soc/amd/sabrina | |
| parent | 7ffbe0a04e5fb2cfa3af10ac05584f535d0b356d (diff) | |
soc/amd/sabrina,vc/amd/fsp/sabrina: Add UART support for Sabrina
Sabrina previously didn't support UART mapping in psp verstage. Now that it has been enabled, add the relevant uart code here.
BUG=b:218709292
TEST=Set serial soft fuse, boot to kernel, check logs
Signed-off-by: Jon Murphy <jpmurphy@google.com>
Change-Id: I591fa69b6e722929839babfff62e9d56c68e1112
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65532
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/amd/sabrina')
| -rw-r--r-- | src/soc/amd/sabrina/psp_verstage/uart.c | 19 |
1 files changed, 17 insertions, 2 deletions
diff --git a/src/soc/amd/sabrina/psp_verstage/uart.c b/src/soc/amd/sabrina/psp_verstage/uart.c index 1c89f10c99..2767b2eb27 100644 --- a/src/soc/amd/sabrina/psp_verstage/uart.c +++ b/src/soc/amd/sabrina/psp_verstage/uart.c @@ -4,8 +4,23 @@ #include <amdblocks/uart.h> #include <types.h> +static void *uart_bars[FCH_UART_ID_MAX]; + uintptr_t get_uart_base(unsigned int idx) { - /* Mapping the UART is not supported. */ - return 0; + uint32_t err; + + if (idx >= ARRAY_SIZE(uart_bars)) + return 0; + + if (uart_bars[idx]) + return (uintptr_t)uart_bars[idx]; + + err = svc_map_fch_dev(FCH_IO_DEVICE_UART, idx, 0, &uart_bars[idx]); + if (err) { + svc_debug_print("Failed to map UART\n"); + return 0; + } + + return (uintptr_t)uart_bars[idx]; } |