summaryrefslogtreecommitdiff
path: root/src/soc/amd/sabrina
diff options
context:
space:
mode:
authorFred Reitberger <reitbergerfred@gmail.com>2022-07-15 08:05:56 -0400
committerFelix Held <felix-coreboot@felixheld.de>2022-08-01 20:44:09 +0000
commitfdb07582567414f9e93c5dc0c24b2dce63485b14 (patch)
tree69c012cd6a7980dcb9a7997fba02a733888e33de /src/soc/amd/sabrina
parent0b4f49c792c21a9a806cc57a5563da4947abc0be (diff)
soc/amd/common/block/apob/apob_cache.c: Add assert for APOB DRAM size
Add static check to ensure the reserved APOB DRAM space is the same size as the MRC_CACHE region specified in the fmap. Update sabrina APOB DRAM size to match the fmap. TEST: Timeless builds identical. Test build with a larger MRC_CACHE than APOB DRAM failed the assert as expected. Signed-off-by: Fred Reitberger <reitbergerfred@gmail.com> Change-Id: Ia14f6ef94b9062df0612fe96098b1012085ccf9c Reviewed-on: https://review.coreboot.org/c/coreboot/+/65878 Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/amd/sabrina')
-rw-r--r--src/soc/amd/sabrina/Kconfig4
-rw-r--r--src/soc/amd/sabrina/root_complex.c4
2 files changed, 4 insertions, 4 deletions
diff --git a/src/soc/amd/sabrina/Kconfig b/src/soc/amd/sabrina/Kconfig
index 62ae5989f9..997a1beadd 100644
--- a/src/soc/amd/sabrina/Kconfig
+++ b/src/soc/amd/sabrina/Kconfig
@@ -125,11 +125,11 @@ config PSP_APOB_DRAM_ADDRESS
config PSP_APOB_DRAM_SIZE
hex
- default 0x20000
+ default 0x1E000
config PSP_SHAREDMEM_BASE
hex
- default 0x2021000 if VBOOT
+ default 0x201F000 if VBOOT
default 0x0
help
This variable defines the base address in DRAM memory where PSP copies
diff --git a/src/soc/amd/sabrina/root_complex.c b/src/soc/amd/sabrina/root_complex.c
index c911106e6b..99602e803b 100644
--- a/src/soc/amd/sabrina/root_complex.c
+++ b/src/soc/amd/sabrina/root_complex.c
@@ -76,7 +76,7 @@ struct dptc_input {
* | (C_ENV_BOOTBLOCK_SIZE) |
* +--------------------------------+ BOOTBLOCK_ADDR = BOOTBLOCK_END - C_ENV_BOOTBLOCK_SIZE
* | Unused hole |
- * | (86KiB) |
+ * | (30KiB) |
* +--------------------------------+
* | FMAP cache (FMAP_SIZE) |
* +--------------------------------+ PSP_SHAREDMEM_BASE + PSP_SHAREDMEM_SIZE + PRERAM_CBMEM_CONSOLE_SIZE + 0x200
@@ -88,7 +88,7 @@ struct dptc_input {
* | PSP shared (vboot workbuf) |
* | (PSP_SHAREDMEM_SIZE) |
* +--------------------------------+ PSP_SHAREDMEM_BASE
- * | APOB (128KiB) |
+ * | APOB (120KiB) |
* +--------------------------------+ PSP_APOB_DRAM_ADDRESS
* | Early BSP stack |
* | (EARLYRAM_BSP_STACK_SIZE) |