diff options
| author | Jeremy Compostella <jeremy.compostella@intel.com> | 2022-06-17 15:18:02 -0700 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-07-04 14:13:15 +0000 |
| commit | 1b44c81d3dc21abf417578dacdc37c13dce28727 (patch) | |
| tree | a10e78d1bf2b23652d4bdc8abcb31a79e72c91a2 /src/soc/amd/sabrina/chip.c | |
| parent | 7c60068b2345a79ab5c12f1484c50fca6006d59f (diff) | |
soc/intel/alderlake: RPL-P power limits and VR settings
This patch sets the Power Limits and Voltage Regulator settings for
three RaptorLake SKUs (45W, 28W and 15W) following the guidance from
document 686872 (June 7th edition).
BUG=b:237809660
TEST=Power Limit and VR serial logs review + debug instrumentation
SKUs successfully booted
Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com>
Change-Id: I7e9d4039615e6c33b869c6243efbfeb2259ac219
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65582
Reviewed-by: Zhixing Ma <zhixing.ma@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Cliff Huang <cliff.huang@intel.com>
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
Diffstat (limited to 'src/soc/amd/sabrina/chip.c')
0 files changed, 0 insertions, 0 deletions