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authorRaul E Rangel <rrangel@chromium.org>2022-01-18 15:29:54 -0700
committerRaul Rangel <rrangel@chromium.org>2022-01-23 16:42:48 +0000
commit86302a806c5cc9b575424305e761753710417692 (patch)
tree6d3c1305d29ad1a9369770e7a9a2ac03b03c4f4b /src/soc/amd/picasso
parent1e1aa0ca4d4d5ae9d0b4917220cc72f9c441b8a2 (diff)
soc/amd/{common,cezanne,picasso}: Add PRE_X86_CBMEM_CONSOLE_SIZE
This change splits the size of the console transfer region and size of the bootblock/romstage Pre-RAM console region. This allows having a larger Pre-RAM console while not impacting the size of the PSP verstage console. Instead of directly using the PRE_X86_CBMEM_CONSOLE_SIZE symbol in `setup_cbmem_console`, I chose to use the offsets provided in the transfer buffer. It would be nice to eventually do this for all the fields in the transfer buffer. BUG=b:213828947 TEST=Boot guybrush and verify verstage logs are no longer truncated Signed-off-by: Raul E Rangel <rrangel@chromium.org> Change-Id: I8b8cc46600192a7db00f5c1f24c3c8304c4db31d Reviewed-on: https://review.coreboot.org/c/coreboot/+/61189 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kangheui Won <khwon@chromium.org>
Diffstat (limited to 'src/soc/amd/picasso')
-rw-r--r--src/soc/amd/picasso/Kconfig6
1 files changed, 6 insertions, 0 deletions
diff --git a/src/soc/amd/picasso/Kconfig b/src/soc/amd/picasso/Kconfig
index ec1270be42..4567d5558b 100644
--- a/src/soc/amd/picasso/Kconfig
+++ b/src/soc/amd/picasso/Kconfig
@@ -138,6 +138,12 @@ config PSP_SHAREDMEM_SIZE
started. The workbuf's base depends on the address of the reset
vector.
+config PRE_X86_CBMEM_CONSOLE_SIZE
+ hex
+ default 0x1600
+ help
+ Size of the CBMEM console used in PSP verstage.
+
config PRERAM_CBMEM_CONSOLE_SIZE
hex
default 0x1600