acpi: Move ACPI table support out of arch/x86 (3/5)

This change moves all ACPI table support in coreboot currently living
under arch/x86 into common code to make it architecture
independent. ACPI table generation is not really tied to any
architecture and hence it makes sense to move this to its own
directory.

In order to make it easier to review, this change is being split into
multiple CLs. This is change 3/5 which basically is generated by
running the following command:
$ git grep -iIl "arch/acpi" | xargs sed -i 's/arch\/acpi/acpi\/acpi/g'

BUG=b:155428745

Change-Id: I16b1c45d954d6440fb9db1d3710063a47b582eae
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40938
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>

10 files changed, 13 insertions, 13 deletions

diff --git a/src/soc/amd/picasso/acpi.c b/src/soc/amd/picasso/acpi.c
index 8e34c85f52..357dbcacb8 100644
--- a/src/soc/amd/picasso/acpi.c
+++ b/src/soc/amd/picasso/acpi.c
@@ -7,8 +7,8 @@
 
 #include <string.h>
 #include <console/console.h>
-#include <arch/acpi.h>
-#include <arch/acpigen.h>
+#include <acpi/acpi.h>
+#include <acpi/acpigen.h>
 #include <device/pci_ops.h>
 #include <arch/ioapic.h>
 #include <cpu/x86/smm.h>
diff --git a/src/soc/amd/picasso/chip.h b/src/soc/amd/picasso/chip.h
index 7c6823239c..c206b2e054 100644
--- a/src/soc/amd/picasso/chip.h
+++ b/src/soc/amd/picasso/chip.h
@@ -11,7 +11,7 @@
 #include <soc/i2c.h>
 #include <soc/iomap.h>
 #include <soc/southbridge.h>
-#include <arch/acpi_device.h>
+#include <acpi/acpi_device.h>
 
 struct soc_amd_picasso_config {
 	/*
@@ -33,7 +33,7 @@ struct soc_amd_picasso_config {
 		I2S_PINS_UNCONF = 7,	/* All pads will be input mode */
 	} acp_pin_cfg;
 
-	/* Options for these are in src/arch/x86/include/arch/acpi.h */
+	/* Options for these are in src/arch/x86/include/acpi/acpi.h */
 	uint8_t  fadt_pm_profile;
 	uint16_t fadt_boot_arch;
 	uint32_t fadt_flags;
diff --git a/src/soc/amd/picasso/finalize.c b/src/soc/amd/picasso/finalize.c
index 09e9b6b4b4..15af741ea1 100644
--- a/src/soc/amd/picasso/finalize.c
+++ b/src/soc/amd/picasso/finalize.c
@@ -1,7 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 /* This file is part of the coreboot project. */
 
-#include <arch/acpi.h>
+#include <acpi/acpi.h>
 #include <cpu/x86/mp.h>
 #include <cpu/x86/msr.h>
 #include <cpu/amd/msr.h>
diff --git a/src/soc/amd/picasso/i2c.c b/src/soc/amd/picasso/i2c.c
index 25dab397c0..454d0c2283 100644
--- a/src/soc/amd/picasso/i2c.c
+++ b/src/soc/amd/picasso/i2c.c
@@ -2,7 +2,7 @@
 /* This file is part of the coreboot project. */
 
 #include <device/mmio.h>
-#include <arch/acpi.h>
+#include <acpi/acpi.h>
 #include <console/console.h>
 #include <delay.h>
 #include <device/device.h>
diff --git a/src/soc/amd/picasso/include/soc/acpi.h b/src/soc/amd/picasso/include/soc/acpi.h
index 68321fffae..c90ce468f1 100644
--- a/src/soc/amd/picasso/include/soc/acpi.h
+++ b/src/soc/amd/picasso/include/soc/acpi.h
@@ -4,7 +4,7 @@
 #ifndef __SOC_PICASSO_ACPI_H__
 #define __SOC_PICASSO_ACPI_H__
 
-#include <arch/acpi.h>
+#include <acpi/acpi.h>
 
 #ifndef FADT_PM_PROFILE
 	#define FADT_PM_PROFILE PM_UNSPECIFIED
diff --git a/src/soc/amd/picasso/mca.c b/src/soc/amd/picasso/mca.c
index cdea0058a8..64e61c04e8 100644
--- a/src/soc/amd/picasso/mca.c
+++ b/src/soc/amd/picasso/mca.c
@@ -2,7 +2,7 @@
 /* This file is part of the coreboot project. */
 
 #include <cpu/x86/msr.h>
-#include <arch/acpi.h>
+#include <acpi/acpi.h>
 #include <soc/cpu.h>
 #include <soc/northbridge.h>
 #include <console/console.h>
diff --git a/src/soc/amd/picasso/northbridge.c b/src/soc/amd/picasso/northbridge.c
index 35d46bcfb6..0f484d22b6 100644
--- a/src/soc/amd/picasso/northbridge.c
+++ b/src/soc/amd/picasso/northbridge.c
@@ -4,8 +4,8 @@
 #include <amdblocks/biosram.h>
 #include <device/pci_ops.h>
 #include <arch/ioapic.h>
-#include <arch/acpi.h>
-#include <arch/acpigen.h>
+#include <acpi/acpi.h>
+#include <acpi/acpigen.h>
 #include <cbmem.h>
 #include <console/console.h>
 #include <cpu/amd/mtrr.h>
diff --git a/src/soc/amd/picasso/pmutil.c b/src/soc/amd/picasso/pmutil.c
index a38acf2461..1db9d00a5d 100644
--- a/src/soc/amd/picasso/pmutil.c
+++ b/src/soc/amd/picasso/pmutil.c
@@ -1,7 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 /* This file is part of the coreboot project. */
 
-#include <arch/acpi.h>
+#include <acpi/acpi.h>
 #include <soc/southbridge.h>
 #include <amdblocks/acpimmio.h>
 #include <security/vboot/vboot_common.h>
diff --git a/src/soc/amd/picasso/romstage.c b/src/soc/amd/picasso/romstage.c
index 329429ef48..8af5821ef2 100644
--- a/src/soc/amd/picasso/romstage.c
+++ b/src/soc/amd/picasso/romstage.c
@@ -3,7 +3,7 @@
 
 #include <arch/cpu.h>
 #include <arch/romstage.h>
-#include <arch/acpi.h>
+#include <acpi/acpi.h>
 #include <cpu/x86/cache.h>
 #include <cpu/x86/msr.h>
 #include <cpu/amd/mtrr.h>
diff --git a/src/soc/amd/picasso/smihandler.c b/src/soc/amd/picasso/smihandler.c
index d399c7d230..cf04c2eace 100644
--- a/src/soc/amd/picasso/smihandler.c
+++ b/src/soc/amd/picasso/smihandler.c
@@ -6,7 +6,7 @@
 #include <cpu/x86/smm.h>
 #include <cpu/x86/cache.h>
 #include <cpu/amd/amd64_save_state.h>
-#include <arch/acpi.h>
+#include <acpi/acpi.h>
 #include <arch/hlt.h>
 #include <device/pci_def.h>
 #include <smmstore.h>