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authorKyösti Mälkki <kyosti.malkki@gmail.com>2021-01-15 13:46:11 +0200
committerKyösti Mälkki <kyosti.malkki@gmail.com>2021-02-11 16:35:32 +0000
commitd6ccbb9d48f97dd3bbd4b947fe3bc4857216a363 (patch)
tree5b6662b1f870efc37cbf221167d7d6b7a56dff01 /src/soc/amd/picasso
parente0936a56ec27a75486743d524958fb34b6f9e896 (diff)
mainboards: Drop PWRS from GNVS
Initialize variable to 1 to indicate AC power supply. If platform has EC it will set this correctly based on whether plugged on the charger or not. Change-Id: I3f834cf7563b9e512fcab34cdb7a27a9f0fd31c0 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/49352 Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/amd/picasso')
-rw-r--r--src/soc/amd/picasso/acpi/globalnvs.asl2
-rw-r--r--src/soc/amd/picasso/include/soc/nvs.h2
2 files changed, 2 insertions, 2 deletions
diff --git a/src/soc/amd/picasso/acpi/globalnvs.asl b/src/soc/amd/picasso/acpi/globalnvs.asl
index 31d375c5e4..3f02657d04 100644
--- a/src/soc/amd/picasso/acpi/globalnvs.asl
+++ b/src/soc/amd/picasso/acpi/globalnvs.asl
@@ -14,7 +14,7 @@ Field (GNVS, ByteAcc, NoLock, Preserve)
/* Miscellaneous */
, 8, // 0x00 - Processor Count
LIDS, 8, // 0x01 - LID State
- PWRS, 8, // 0x02 - AC Power State
+ , 8, // 0x02 - AC Power State
CBMC, 32, // 0x03 - 0x06 - coreboot Memory Console
PM1I, 64, // 0x07 - 0x0e - System Wake Source - PM1 Index
GPEI, 64, // 0x0f - 0x16 - GPE Wake Source
diff --git a/src/soc/amd/picasso/include/soc/nvs.h b/src/soc/amd/picasso/include/soc/nvs.h
index b8945ffe3a..2829f7d20d 100644
--- a/src/soc/amd/picasso/include/soc/nvs.h
+++ b/src/soc/amd/picasso/include/soc/nvs.h
@@ -16,7 +16,7 @@ struct __packed global_nvs {
/* Miscellaneous */
uint8_t unused_was_pcnt; /* 0x00 - Processor Count */
uint8_t lids; /* 0x01 - LID State */
- uint8_t pwrs; /* 0x02 - AC Power State */
+ uint8_t unused_was_pwrs; /* 0x02 - AC Power State */
uint32_t cbmc; /* 0x03 - 0x06 - coreboot Memory Console */
uint64_t pm1i; /* 0x07 - 0x0e - System Wake Source - PM1 Index */
uint64_t gpei; /* 0x0f - 0x16 - GPE Wake Source */