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authorFelix Held <felix-coreboot@felixheld.de>2021-02-13 20:47:04 +0100
committerFelix Held <felix-coreboot@felixheld.de>2021-02-14 20:53:47 +0000
commit985f3e05e338d0d8e3aed0028c11471bc626fdc9 (patch)
tree802de1d8ebc1f5e3449297f3ef377a26a096567f /src/soc/amd/picasso
parent602f93ed520552585a3f15c1b5e7161fb9329d6c (diff)
soc/amd/picasso/data_fabric: factor out common MMIO register defines
Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I663a73308d33f48c6b945007f3eaac84d4712f59 Reviewed-on: https://review.coreboot.org/c/coreboot/+/50639 Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/amd/picasso')
-rw-r--r--src/soc/amd/picasso/include/soc/data_fabric.h15
1 files changed, 2 insertions, 13 deletions
diff --git a/src/soc/amd/picasso/include/soc/data_fabric.h b/src/soc/amd/picasso/include/soc/data_fabric.h
index 3a19318cfd..3a1f2c714a 100644
--- a/src/soc/amd/picasso/include/soc/data_fabric.h
+++ b/src/soc/amd/picasso/include/soc/data_fabric.h
@@ -8,22 +8,11 @@
/* D18F0 - Fabric Configuration registers */
#define IOMS0_FABRIC_ID 9
+#define NUM_NB_MMIO_REGS 8
+
#define D18F0_VGAEN 0x80
#define VGA_ADDR_ENABLE BIT(0)
-#define D18F0_MMIO_BASE0 0x200
-#define D18F0_MMIO_LIMIT0 0x204
-#define D18F0_MMIO_SHIFT 16
-#define D18F0_MMIO_CTRL0 0x208
-#define MMIO_NP BIT(12)
-#define MMIO_DST_FABRIC_ID_SHIFT 4
-#define MMIO_WE BIT(1)
-#define MMIO_RE BIT(0)
-#define NUM_NB_MMIO_REGS 8
-#define NB_MMIO_BASE(reg) ((reg) * 4 * sizeof(uint32_t) + D18F0_MMIO_BASE0)
-#define NB_MMIO_LIMIT(reg) ((reg) * 4 * sizeof(uint32_t) + D18F0_MMIO_LIMIT0)
-#define NB_MMIO_CONTROL(reg) ((reg) * 4 * sizeof(uint32_t) + D18F0_MMIO_CTRL0)
-
#define D18F0_DRAM_HOLE_CTL 0x104
#define DRAM_HOLE_CTL_VALID BIT(0)
#define DRAM_HOLE_CTL_BASE_SHFT 24