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authorFelix Held <felix-coreboot@felixheld.de>2021-02-08 18:16:07 +0100
committerFelix Held <felix-coreboot@felixheld.de>2021-02-09 19:15:54 +0000
commit6e2f5f2ee73fb1034ad342d3a2df705ec4ab9d4b (patch)
tree8e5320eaf730798a673f93a76ca72443c483c476 /src/soc/amd/picasso
parentfa265fdc3b02a322d39a12105616d4fac43a1023 (diff)
soc/amd/picasso: move smm_region to soc/amd/common/block/cpu/noncar
The same functionality is needed on Cezanne. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I40f9d2fe7d144e94369a417225bcca0a299d1f45 Reviewed-on: https://review.coreboot.org/c/coreboot/+/50400 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-by: Raul Rangel <rrangel@chromium.org>
Diffstat (limited to 'src/soc/amd/picasso')
-rw-r--r--src/soc/amd/picasso/memmap.c49
1 files changed, 0 insertions, 49 deletions
diff --git a/src/soc/amd/picasso/memmap.c b/src/soc/amd/picasso/memmap.c
index 8424d463b1..970d1373dc 100644
--- a/src/soc/amd/picasso/memmap.c
+++ b/src/soc/amd/picasso/memmap.c
@@ -3,60 +3,11 @@
#include <assert.h>
#include <stdint.h>
#include <console/console.h>
-#include <cpu/x86/smm.h>
-#include <cpu/amd/msr.h>
#include <arch/bert_storage.h>
#include <memrange.h>
#include <fsp/util.h>
#include <FspGuids.h>
-/*
- * For data stored in TSEG, ensure TValid is clear so R/W access can reach
- * the DRAM when not in SMM.
- */
-static void clear_tvalid(void)
-{
- msr_t hwcr = rdmsr(HWCR_MSR);
- msr_t mask = rdmsr(SMM_MASK_MSR);
- int tvalid = !!(mask.lo & SMM_TSEG_VALID);
-
- if (hwcr.lo & SMM_LOCK) {
- if (!tvalid) /* not valid but locked means still accessible */
- return;
-
- printk(BIOS_ERR, "Error: can't clear TValid, already locked\n");
- return;
- }
-
- mask.lo &= ~SMM_TSEG_VALID;
- wrmsr(SMM_MASK_MSR, mask);
-}
-
-void smm_region(uintptr_t *start, size_t *size)
-{
- static int once;
- struct range_entry tseg;
- int status;
-
- *start = 0;
- *size = 0;
-
- status = fsp_find_range_hob(&tseg, AMD_FSP_TSEG_HOB_GUID.b);
-
- if (status < 0) {
- printk(BIOS_ERR, "Error: unable to find TSEG HOB\n");
- return;
- }
-
- *start = (uintptr_t)range_entry_base(&tseg);
- *size = range_entry_size(&tseg);
-
- if (!once) {
- clear_tvalid();
- once = 1;
- }
-}
-
void bert_reserved_region(void **start, size_t *size)
{
struct range_entry bert;