soc/amd/picasso,stoneyridge: Unify set_nvs_sws()

Change-Id: I673f038b4ce3c4141db128a65be71e7a242dfd28
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48856
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>

1 files changed, 0 insertions, 13 deletions

diff --git a/src/soc/amd/picasso/fch.c b/src/soc/amd/picasso/fch.c
index 7479a35cab..ac5329de1d 100644
--- a/src/soc/amd/picasso/fch.c
+++ b/src/soc/amd/picasso/fch.c
@@ -145,19 +145,6 @@ static void sb_init_acpi_ports(void)
 				PM_ACPI_TIMER_EN_EN);
 }
 
-static void set_nvs_sws(void *unused)
-{
-	struct chipset_state *state;
-
-	state = cbmem_find(CBMEM_ID_POWER_STATE);
-	if (state == NULL)
-		return;
-
-	pm_fill_gnvs(&state->gpe_state);
-}
-
-BOOT_STATE_INIT_ENTRY(BS_OS_RESUME, BS_ON_ENTRY, set_nvs_sws, NULL);
-
 /*
  * A-Link to AHB bridge, part of the AMBA fabric. These are internal clocks
  * and unneeded for Raven/Picasso so gate them to save power.