diff options
author | Arthur Heymans <arthur@aheymans.xyz> | 2022-09-20 14:03:28 +0200 |
---|---|---|
committer | Felix Held <felix-coreboot@felixheld.de> | 2022-10-13 19:40:01 +0000 |
commit | 7f3807728bdbf2a9a6e9a6177748ff383c47d43d (patch) | |
tree | 1c73fbbcb0cf178c5d224226d22666e89b906942 /src/soc/amd/picasso | |
parent | bd15ece78af605bca9fc092baa094c87d5b8244b (diff) |
soc/amd/*: Hook up device_operations in chipset.cb
This removes the need for a lot of boilerplate code in the soc code to
hook up device_operations to devices.
Change-Id: I2afc1855407910f1faa9bdd4e9416dd46474658e
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/67738
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martin.roth@amd.corp-partner.google.com>
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
Diffstat (limited to 'src/soc/amd/picasso')
-rw-r--r-- | src/soc/amd/picasso/chip.c | 45 | ||||
-rw-r--r-- | src/soc/amd/picasso/chipset.cb | 14 |
2 files changed, 10 insertions, 49 deletions
diff --git a/src/soc/amd/picasso/chip.c b/src/soc/amd/picasso/chip.c index 6a6c49e28f..37e62e2b8f 100644 --- a/src/soc/amd/picasso/chip.c +++ b/src/soc/amd/picasso/chip.c @@ -13,12 +13,7 @@ #include "chip.h" #include <fsp/api.h> -/* Supplied by i2c.c */ -extern struct device_operations soc_amd_i2c_mmio_ops; -/* Supplied by uart.c */ -extern struct device_operations picasso_uart_mmio_ops; - -struct device_operations cpu_bus_ops = { +struct device_operations picasso_cpu_bus_ops = { .read_resources = noop_read_resources, .set_resources = noop_set_resources, .init = mp_cpu_bus_init, @@ -38,48 +33,13 @@ static const char *soc_acpi_name(const struct device *dev) return NULL; }; -static struct device_operations pci_domain_ops = { +struct device_operations picasso_pci_domain_ops = { .read_resources = pci_domain_read_resources, .set_resources = pci_domain_set_resources, .scan_bus = pci_domain_scan_bus, .acpi_name = soc_acpi_name, }; -static void set_mmio_dev_ops(struct device *dev) -{ - switch (dev->path.mmio.addr) { - case APU_I2C2_BASE: - case APU_I2C3_BASE: - case APU_I2C4_BASE: - dev->ops = &soc_amd_i2c_mmio_ops; - break; - case APU_UART0_BASE: - case APU_UART1_BASE: - case APU_UART2_BASE: - case APU_UART3_BASE: - dev->ops = &picasso_uart_mmio_ops; - break; - } -} - -static void enable_dev(struct device *dev) -{ - /* Set the operations if it is a special bus type */ - switch (dev->path.type) { - case DEVICE_PATH_DOMAIN: - dev->ops = &pci_domain_ops; - break; - case DEVICE_PATH_CPU_CLUSTER: - dev->ops = &cpu_bus_ops; - break; - case DEVICE_PATH_MMIO: - set_mmio_dev_ops(dev); - break; - default: - break; - } -} - static void soc_init(void *chip_info) { default_dev_ops_root.write_acpi_tables = agesa_write_acpi_tables; @@ -97,7 +57,6 @@ static void soc_final(void *chip_info) struct chip_operations soc_amd_picasso_ops = { CHIP_NAME("AMD Picasso SOC") - .enable_dev = enable_dev, .init = soc_init, .final = soc_final }; diff --git a/src/soc/amd/picasso/chipset.cb b/src/soc/amd/picasso/chipset.cb index dfa5418198..76953c73ae 100644 --- a/src/soc/amd/picasso/chipset.cb +++ b/src/soc/amd/picasso/chipset.cb @@ -2,8 +2,10 @@ chip soc/amd/picasso device cpu_cluster 0 on + ops picasso_cpu_bus_ops end device domain 0 on + ops picasso_pci_domain_ops device pci 00.0 alias gnb on end device pci 00.2 alias iommu off end device pci 01.0 on end # Dummy Host Bridge, do not disable @@ -43,10 +45,10 @@ chip soc/amd/picasso device pci 18.7 alias data_fabric_7 on end end - device mmio 0xfedc4000 alias i2c_2 off end - device mmio 0xfedc5000 alias i2c_3 off end - device mmio 0xfedc9000 alias uart_0 off end - device mmio 0xfedca000 alias uart_1 off end - device mmio 0xfedce000 alias uart_2 off end - device mmio 0xfedcf000 alias uart_3 off end + device mmio 0xfedc4000 alias i2c_2 off ops soc_amd_i2c_mmio_ops end + device mmio 0xfedc5000 alias i2c_3 off ops soc_amd_i2c_mmio_ops end + device mmio 0xfedc9000 alias uart_0 off ops picasso_uart_mmio_ops end + device mmio 0xfedca000 alias uart_1 off ops picasso_uart_mmio_ops end + device mmio 0xfedce000 alias uart_2 off ops picasso_uart_mmio_ops end + device mmio 0xfedcf000 alias uart_3 off ops picasso_uart_mmio_ops end end |