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authorRaul E Rangel <rrangel@chromium.org>2020-06-04 16:35:05 -0600
committerPatrick Georgi <pgeorgi@google.com>2020-06-06 09:41:28 +0000
commitf9b9166431d758a6bed27008fc49f752b499f83d (patch)
tree0d91080bfad06578c9ac4b32fd93ab328c74cf07 /src/soc/amd/picasso
parentabf51abe1d30386cc6e4aee8aca0cd2fd225f853 (diff)
soc/amd/picasso: Remove call to setup_bsp_ramtop
We don't use amd_setup_mtrrs, bsp_topmem or bsp_topmem2 in picasso. BUG=b:147042464 TEST=Boot to OS on trembyle Signed-off-by: Raul E Rangel <rrangel@chromium.org> Change-Id: I1941934975dfea4f189347811b003a33996c887a Reviewed-on: https://review.coreboot.org/c/coreboot/+/42086 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/amd/picasso')
-rw-r--r--src/soc/amd/picasso/chip.c2
1 files changed, 0 insertions, 2 deletions
diff --git a/src/soc/amd/picasso/chip.c b/src/soc/amd/picasso/chip.c
index ed39b53549..d364b9a88c 100644
--- a/src/soc/amd/picasso/chip.c
+++ b/src/soc/amd/picasso/chip.c
@@ -1,6 +1,5 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-#include <cpu/amd/mtrr.h>
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
@@ -159,7 +158,6 @@ static void soc_init(void *chip_info)
data_fabric_set_mmio_np();
southbridge_init(chip_info);
- setup_bsp_ramtop();
}
static void soc_final(void *chip_info)