diff options
author | Felix Held <felix-coreboot@felixheld.de> | 2021-02-02 01:10:59 +0100 |
---|---|---|
committer | Felix Held <felix-coreboot@felixheld.de> | 2021-02-03 20:00:48 +0000 |
commit | ee1fb0aa1a316193d93b7a8b81b448b780f32e92 (patch) | |
tree | 39b0234e77ad658ca531d89981c0d873d324e56b /src/soc/amd/picasso | |
parent | 70f1af8934db9ca840eff994f93ae3aaa096bf84 (diff) |
soc/amd: rename sb_init_acpi_ports to fch_init_acpi_ports
There's no dedicated south bridge any more and now we have integrated
FCHs in the SoCs.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I19126da09f034f51b134f8d6ae2006f57fac1b0d
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50209
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/amd/picasso')
-rw-r--r-- | src/soc/amd/picasso/fch.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/soc/amd/picasso/fch.c b/src/soc/amd/picasso/fch.c index fa99db8334..e6cd51acc0 100644 --- a/src/soc/amd/picasso/fch.c +++ b/src/soc/amd/picasso/fch.c @@ -115,7 +115,7 @@ static void sb_rfmux_config_override(void) } } -static void sb_init_acpi_ports(void) +static void fch_init_acpi_ports(void) { u32 reg; @@ -220,7 +220,7 @@ static void gpp_clk_setup(void) void fch_init(void *chip_info) { i2c_soc_init(); - sb_init_acpi_ports(); + fch_init_acpi_ports(); acpi_pm_gpe_add_events_print_events(); gpio_add_events(); |