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authorRaul E Rangel <rrangel@chromium.org>2021-01-21 13:42:17 -0700
committerPatrick Georgi <pgeorgi@google.com>2021-01-25 08:52:53 +0000
commitc39f0097393f5427b45657ecb3858a1b9ae529f7 (patch)
tree6a003b6c9031532ef9ae9cf1ef7c457f1a2ffd42 /src/soc/amd/picasso
parentc6c64e844b8dd96a4019e1deb80a35428fe9a1fa (diff)
soc/amd/picasso/acpi: Add UID for PCI INT devices
If a _HID/_CID are not unique, we need to add a _UID field to differentiate the objects. BUG=b:175146875 BRANCH=zork TEST=Boot linux, dump ACPI table and verify UIDs are unique Signed-off-by: Raul E Rangel <rrangel@chromium.org> Change-Id: Icd2ccede2b6c2e332157e2eeca89fba14a46b360 Reviewed-on: https://review.coreboot.org/c/coreboot/+/49811 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/soc/amd/picasso')
-rw-r--r--src/soc/amd/picasso/acpi/pci_int.asl20
1 files changed, 10 insertions, 10 deletions
diff --git a/src/soc/amd/picasso/acpi/pci_int.asl b/src/soc/amd/picasso/acpi/pci_int.asl
index feaec12d29..0a6dec8906 100644
--- a/src/soc/amd/picasso/acpi/pci_int.asl
+++ b/src/soc/amd/picasso/acpi/pci_int.asl
@@ -20,10 +20,10 @@
}
})
-#define PCI_LINK(DEV_NAME, PIC_REG, APIC_REG) \
+#define PCI_LINK(DEV_NAME, PIC_REG, APIC_REG, UID) \
Device(DEV_NAME) { \
Name(_HID, EISAID("PNP0C0F")) \
- Name(_UID, 1) \
+ Name(_UID, UID) \
\
Method(_STA, 0) { \
If (PMOD) { \
@@ -100,11 +100,11 @@
} \
}
-PCI_LINK(INTA, PIRA, IORA)
-PCI_LINK(INTB, PIRB, IORB)
-PCI_LINK(INTC, PIRC, IORC)
-PCI_LINK(INTD, PIRD, IORD)
-PCI_LINK(INTE, PIRE, IORE)
-PCI_LINK(INTF, PIRF, IORF)
-PCI_LINK(INTG, PIRG, IORG)
-PCI_LINK(INTH, PIRH, IORH)
+PCI_LINK(INTA, PIRA, IORA, 0)
+PCI_LINK(INTB, PIRB, IORB, 1)
+PCI_LINK(INTC, PIRC, IORC, 2)
+PCI_LINK(INTD, PIRD, IORD, 3)
+PCI_LINK(INTE, PIRE, IORE, 4)
+PCI_LINK(INTF, PIRF, IORF, 5)
+PCI_LINK(INTG, PIRG, IORG, 6)
+PCI_LINK(INTH, PIRH, IORH, 7)