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author | Felix Held <felix-coreboot@felixheld.de> | 2023-04-11 21:21:35 +0200 |
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committer | Jakub Czapiga <jacz@semihalf.com> | 2023-04-13 05:53:25 +0000 |
commit | 915c3878043752359a4f1b1a1fabb39e0eb3ed7d (patch) | |
tree | 2f6022e7cf74b66fbba4442e8ef72be67034bbb5 /src/soc/amd/picasso/uart.c | |
parent | 4d8a352c5a9541cfce059269388a22216f3c24af (diff) |
soc/amd/stoneyridge/northbridge: use common acpi_fill_root_complex_tom
Use the common acpi_fill_root_complex_tom function instead of the SoC-
level northbridge_fill_ssdt_generator function that does basically the
same.
TEST=Resulting coreboot SSDT remains unchanged on Careena.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Ie0f100e0766ce0f826daceba7dbec1fb88492938
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74303
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
Diffstat (limited to 'src/soc/amd/picasso/uart.c')
0 files changed, 0 insertions, 0 deletions