diff options
| author | Felix Held <felix-coreboot@felixheld.de> | 2020-12-01 21:17:17 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2020-12-02 21:27:49 +0000 |
| commit | 43a5f88bb428080ab6e361ef6bc5e92169ee8452 (patch) | |
| tree | 4470595869d80e49daee420998e0dd9eb36b3752 /src/soc/amd/picasso/southbridge.c | |
| parent | 875e5aa96c8d9e767d24b99015abb66bf7e0ef75 (diff) | |
soc/amd: factor out fch_smbus_init
Change-Id: I6df9323dc4e7ca99fd5368f0262e850c0aca5c54
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48218
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Diffstat (limited to 'src/soc/amd/picasso/southbridge.c')
| -rw-r--r-- | src/soc/amd/picasso/southbridge.c | 14 |
1 files changed, 0 insertions, 14 deletions
diff --git a/src/soc/amd/picasso/southbridge.c b/src/soc/amd/picasso/southbridge.c index edbcb60b5f..f3424497c4 100644 --- a/src/soc/amd/picasso/southbridge.c +++ b/src/soc/amd/picasso/southbridge.c @@ -113,20 +113,6 @@ void sb_clk_output_48Mhz(void) misc_write32(MISC_CLK_CNTL1, ctrl); } -static void fch_smbus_init(void) -{ - /* 400 kHz smbus speed. */ - const uint8_t smbus_speed = (66000000 / (400000 * 4)); - - pm_write8(SMB_ASF_IO_BASE, SMB_BASE_ADDR >> 8); - smbus_write8(SMBTIMING, smbus_speed); - /* Clear all SMBUS status bits */ - smbus_write8(SMBHSTSTAT, SMBHST_STAT_CLEAR); - smbus_write8(SMBSLVSTAT, SMBSLV_STAT_CLEAR); - asf_write8(SMBHSTSTAT, SMBHST_STAT_CLEAR); - asf_write8(SMBSLVSTAT, SMBSLV_STAT_CLEAR); -} - static void lpc_configure_decodes(void) { if (CONFIG(POST_IO) && (CONFIG_POST_IO_PORT == 0x80)) |