diff options
| author | Marshall Dawson <marshalldawson3rd@gmail.com> | 2019-07-01 10:53:40 -0500 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2019-07-03 21:48:52 +0000 |
| commit | 7997f1ff88d6154890b2489c93548f266ae6b8a9 (patch) | |
| tree | 810efcd701b1394ca8146b677f79790f602dd86d /src/soc/amd/picasso/southbridge.c | |
| parent | fa4a74b098731bf3e0979c20a65fa883bf4c57f3 (diff) | |
soc/amd/picasso: Remove SD controller
Change-Id: Ie9cf361ed0caba9c73727453c4a503557edc854d
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33988
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/soc/amd/picasso/southbridge.c')
| -rw-r--r-- | src/soc/amd/picasso/southbridge.c | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/src/soc/amd/picasso/southbridge.c b/src/soc/amd/picasso/southbridge.c index dca3591f85..87b933e119 100644 --- a/src/soc/amd/picasso/southbridge.c +++ b/src/soc/amd/picasso/southbridge.c @@ -578,7 +578,7 @@ void southbridge_init(void *chip_info) static void set_sb_final_nvs(void) { - const struct device *sd, *sata; + const struct device *sata; struct global_nvs_t *gnvs = cbmem_find(CBMEM_ID_ACPI_GNVS); if (gnvs == NULL) @@ -591,8 +591,6 @@ static void set_sb_final_nvs(void) gnvs->aoac.ut0e = is_aoac_device_enabled(FCH_AOAC_D3_STATE_UART0); gnvs->aoac.ut1e = is_aoac_device_enabled(FCH_AOAC_D3_STATE_UART1); /* Rely on these being in sync with devicetree */ - sd = pcidev_path_on_root(SD_DEVFN); - gnvs->aoac.sd_e = sd && sd->enabled ? 1 : 0; sata = pcidev_path_on_root(SATA_DEVFN); gnvs->aoac.st_e = sata && sata->enabled ? 1 : 0; gnvs->aoac.espi = 1; |