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author | Felix Held <felix-coreboot@felixheld.de> | 2020-12-05 01:55:27 +0100 |
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committer | Felix Held <felix-coreboot@felixheld.de> | 2020-12-06 19:04:33 +0000 |
commit | 507fc03b19faededb3ada50fa9f759f79786c8f5 (patch) | |
tree | 47dad46c76504053483f3601768a48770eb9e63d /src/soc/amd/picasso/romstage.c | |
parent | 0f058f68a24643acfca7fb5825ddbab19ff732c3 (diff) |
soc/amd/picasso: remove config_t typedef
Change-Id: Idc0061e7b88134ab17cb65429133cffd16ca5651
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48316
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Diffstat (limited to 'src/soc/amd/picasso/romstage.c')
-rw-r--r-- | src/soc/amd/picasso/romstage.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/amd/picasso/romstage.c b/src/soc/amd/picasso/romstage.c index 9be970ddac..bf66759a94 100644 --- a/src/soc/amd/picasso/romstage.c +++ b/src/soc/amd/picasso/romstage.c @@ -90,7 +90,7 @@ static bool devtree_sata_dev_enabled(void) void platform_fsp_memory_init_params_cb(FSPM_UPD *mupd, uint32_t version) { FSP_M_CONFIG *mcfg = &mupd->FspmConfig; - const config_t *config = config_of_soc(); + const struct soc_amd_picasso_config *config = config_of_soc(); mupd->FspmArchUpd.NvsBufferPtr = soc_fill_mrc_cache(); |