diff options
| author | Felix Held <felix-coreboot@felixheld.de> | 2020-12-09 02:18:00 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2020-12-10 01:22:06 +0000 |
| commit | 5d7fa16c5c7e625371a1fcffedff99027f8b35d8 (patch) | |
| tree | 65eda617570febc8eb63ff408e86f95f5143d626 /src/soc/amd/picasso/reset.c | |
| parent | 1e63e361c68eda9c4876de24416880ab83ec29d9 (diff) | |
soc/amd/picasso/reset: use port and bit defines from cf9_reset.h
The register name and the name of one bit are slightly different, but
have the same functionality.
Change-Id: I025f1c7b2c7643afe245f2275ae6ef45e64b951a
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48487
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/amd/picasso/reset.c')
| -rw-r--r-- | src/soc/amd/picasso/reset.c | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/src/soc/amd/picasso/reset.c b/src/soc/amd/picasso/reset.c index dea166a11f..e16223a50e 100644 --- a/src/soc/amd/picasso/reset.c +++ b/src/soc/amd/picasso/reset.c @@ -2,6 +2,7 @@ #include <arch/io.h> #include <console/console.h> +#include <cf9_reset.h> #include <reset.h> #include <soc/reset.h> #include <soc/southbridge.h> @@ -27,7 +28,7 @@ void do_cold_reset(void) /* De-assert and then assert all PwrGood signals on CF9 reset. */ pm_write16(PWR_RESET_CFG, pm_read16(PWR_RESET_CFG) | TOGGLE_ALL_PWR_GOOD); - outb(RST_CMD | SYS_RST, SYS_RESET); + outb(RST_CPU | SYS_RST, RST_CNT); } void do_warm_reset(void) @@ -35,7 +36,7 @@ void do_warm_reset(void) set_warm_reset_flag(); /* Assert reset signals only. */ - outb(RST_CMD | SYS_RST, SYS_RESET); + outb(RST_CPU | SYS_RST, RST_CNT); } void do_board_reset(void) |