diff options
author | Martin Roth <martinroth@chromium.org> | 2020-10-23 15:24:30 -0600 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2020-11-02 06:12:11 +0000 |
commit | 89815c96a60a89104cf75230f03de16690e9276c (patch) | |
tree | 55ae6f879bcee863e3f5de5ced97f7b89c6c9828 /src/soc/amd/picasso/memlayout_psp_verstage.ld | |
parent | 0d76194a1b8a02c473a957f28abc731b7cdcb9ba (diff) |
soc/amd/picasso: Put transfer buffer into common ld file
Instead of having the same linker layout for the transfer buffer between
the x86 & PSP linker layout scripts, put the common layout into a file
shared between the other linker scripts.
BUG=None
TEST=Boot zork board, verify the buffers are aligned.
BRANCH=Zork
Signed-off-by: Martin Roth <martinroth@chromium.org>
Change-Id: Ib9d9d8b046bc9e9e7a4ee939324960bfc44c3508
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46900
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Diffstat (limited to 'src/soc/amd/picasso/memlayout_psp_verstage.ld')
-rw-r--r-- | src/soc/amd/picasso/memlayout_psp_verstage.ld | 11 |
1 files changed, 1 insertions, 10 deletions
diff --git a/src/soc/amd/picasso/memlayout_psp_verstage.ld b/src/soc/amd/picasso/memlayout_psp_verstage.ld index 4ad88b1108..e7a6c84000 100644 --- a/src/soc/amd/picasso/memlayout_psp_verstage.ld +++ b/src/soc/amd/picasso/memlayout_psp_verstage.ld @@ -51,16 +51,7 @@ SECTIONS ALIGN_COUNTER(64) _everstage = .; - ALIGN_COUNTER(64) - _transfer_buffer = .; - REGION(transfer_info, ., TRANSFER_INFO_SIZE, 4) - ALIGN_COUNTER(64) - REGION(vboot2_work, ., VB2_FIRMWARE_WORKBUF_RECOMMENDED_SIZE, 64) - ALIGN_COUNTER(64) - PRERAM_CBMEM_CONSOLE(., CONFIG_PRERAM_CBMEM_CONSOLE_SIZE) - TIMESTAMP(., TIMESTAMP_BUFFER_SIZE) - FMAP_CACHE(., FMAP_SIZE) - _etransfer_buffer = .; + #include "memlayout_transfer_buffer.inc" PSP_VERSTAGE_TEMP_STACK_END = (PSP_VERSTAGE_TEMP_STACK_START + PSP_VERSTAGE_TEMP_STACK_SIZE ); |