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authorFelix Held <felix-coreboot@felixheld.de>2021-04-13 19:36:53 +0200
committerFelix Held <felix-coreboot@felixheld.de>2021-04-14 18:46:23 +0000
commitbbb8c042e4ee01cf55d9e19ecedc1bb0d65bf4b7 (patch)
tree9c9ef019d083d6bf258e6142f5853a01c62947ca /src/soc/amd/picasso/include
parent43cd1c0bbedd852a9d5e53a32c75826e8bdcc8b2 (diff)
soc/amd/piasso/fch: use common pm_set_power_failure_state functionality
The functionality to restore the previous power state after power was lost that could previously be enabled by selecting MAINBOARD_POWER_RESTORE in the mainboard's Kconfig can now be achieved by selecting POWER_STATE_PREVIOUS_AFTER_FAILURE in the mainboard's Kconfig instead. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: Iab9578ebea89651dc2389bf6ca93ca3f3507eb47 Reviewed-on: https://review.coreboot.org/c/coreboot/+/52302 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org>
Diffstat (limited to 'src/soc/amd/picasso/include')
-rw-r--r--src/soc/amd/picasso/include/soc/southbridge.h4
1 files changed, 0 insertions, 4 deletions
diff --git a/src/soc/amd/picasso/include/soc/southbridge.h b/src/soc/amd/picasso/include/soc/southbridge.h
index ede210852c..e2a069baff 100644
--- a/src/soc/amd/picasso/include/soc/southbridge.h
+++ b/src/soc/amd/picasso/include/soc/southbridge.h
@@ -32,10 +32,6 @@
#define PM_SERIRQ_MODE BIT(6)
#define PM_SERIRQ_ENABLE BIT(7)
-#define PM_RTC_SHADOW 0x5b /* state when power resumes */
-#define PM_S5_AT_POWER_RECOVERY 0x04 /* S5 */
-#define PM_RESTORE_S0_IF_PREV_S0 0x07 /* S0 if previously at S0 */
-
#define PM_EVT_BLK 0x60
#define WAK_STS BIT(15) /*AcpiPmEvtBlkx00 Pm1Status */
#define PCIEXPWAK_STS BIT(14)