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authorFelix Held <felix-coreboot@felixheld.de>2021-03-10 23:29:11 +0100
committerFelix Held <felix-coreboot@felixheld.de>2021-03-12 00:48:01 +0000
commit03a4bfc54d6a467da1ba89ddc9e68e6637f90938 (patch)
tree69431723d80351d2b85904553f2fc3c59788e298 /src/soc/amd/picasso/include
parente995684fa1212784bb2642ad21e4e0ce60b19130 (diff)
soc/amd/common/block/smu: rename mailbox register defines
Since we have the SMN access block now, rename the SMU mailbox interface registers to clarify that those are in the SMN register space. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: Ic5b7093f99eabd3c29610072b186ed156f335bd8 Reviewed-on: https://review.coreboot.org/c/coreboot/+/51400 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Diffstat (limited to 'src/soc/amd/picasso/include')
-rw-r--r--src/soc/amd/picasso/include/soc/smu.h11
1 files changed, 4 insertions, 7 deletions
diff --git a/src/soc/amd/picasso/include/soc/smu.h b/src/soc/amd/picasso/include/soc/smu.h
index 2dd0e7b6a2..e404a1e086 100644
--- a/src/soc/amd/picasso/include/soc/smu.h
+++ b/src/soc/amd/picasso/include/soc/smu.h
@@ -3,13 +3,10 @@
#ifndef AMD_PICASSO_SMU_H
#define AMD_PICASSO_SMU_H
-/*
- * SMU mailbox register offsets in indirect address space accessed by an index/data pair in
- * D0F00 config space.
- */
-#define REG_ADDR_MESG_ID 0x3b10528
-#define REG_ADDR_MESG_RESP 0x3b10564
-#define REG_ADDR_MESG_ARGS_BASE 0x3b10998
+/* SMU mailbox register offsets in SMN */
+#define SMN_SMU_MESG_ID 0x3b10528
+#define SMN_SMU_MESG_RESP 0x3b10564
+#define SMN_SMU_MESG_ARGS_BASE 0x3b10998
#define SMU_NUM_ARGS 6