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authorFelix Held <felix-coreboot@felixheld.de>2020-11-12 00:14:16 +0100
committerFelix Held <felix-coreboot@felixheld.de>2020-11-15 16:48:38 +0000
commit60a4643d6f53c2770bede1a649c3f14cafaa8b75 (patch)
treec0b2f8f9c69dcd1faeb33e870e8566195edcaefd /src/soc/amd/picasso/include
parent34c59056143f3611083fe8f6a88e9920f6a8531e (diff)
soc/amd/common: factor out SMU code from Picasso
The SMU mailbox access code from Picasso can be reused in the next generation, so factor out the code to soc/amd/common/block/smu. Since the mailbox register offsets in the indirect address space, the number of arguments and the message IDs don't always match between different devices, keep those in the soc-specific directories. Change-Id: Ibaf5b91ab35428e4c771e7163c6e0c4fc50371e7 Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47483 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Jeremy Soller <jeremy@system76.com> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Diffstat (limited to 'src/soc/amd/picasso/include')
-rw-r--r--src/soc/amd/picasso/include/soc/smu.h26
1 files changed, 6 insertions, 20 deletions
diff --git a/src/soc/amd/picasso/include/soc/smu.h b/src/soc/amd/picasso/include/soc/smu.h
index eb7573c52b..c402508653 100644
--- a/src/soc/amd/picasso/include/soc/smu.h
+++ b/src/soc/amd/picasso/include/soc/smu.h
@@ -3,37 +3,23 @@
#ifndef __PICASSO_SMU_H__
#define __PICASSO_SMU_H__
-#include <types.h>
-
-/* SMU registers accessed indirectly using an index/data pair in D0F00 config space */
-#define SMU_INDEX_ADDR 0xb8 /* 32 bit */
-#define SMU_DATA_ADDR 0xbc /* 32 bit */
-
+/*
+ * SMU mailbox register offsets in indirect address space accessed by an index/data pair in
+ * D0F00 config space.
+ */
#define REG_ADDR_MESG_ID 0x3b10528
#define REG_ADDR_MESG_RESP 0x3b10564
#define REG_ADDR_MESG_ARGS_BASE 0x3b10998
-/* Argument 0-5 indexed locations are contiguous */
#define SMU_NUM_ARGS 6
-#define REG_ADDR_MESG_ARG(x) (REG_ADDR_MESG_ARGS_BASE + ((x) * sizeof(uint32_t)))
enum smu_message_id {
SMC_MSG_S3ENTRY = 0x0c,
};
-struct smu_payload {
- uint32_t msg[SMU_NUM_ARGS];
-};
-
-/*
- * Send a message and bi-directional payload to the SMU. SMU response, if
- * any, is returned via arg. Returns 0 if success or -1 on failure.
- */
-enum cb_err send_smu_message(enum smu_message_id id, struct smu_payload *arg);
-
/*
- * Request the SMU put system into S3, S4, or S5. On entry, SlpTyp determines
- * S-State and SlpTypeEn is clear. Function does not return if successful.
+ * Request the SMU put system into S3, S4, or S5. On entry, SlpTyp determines S-State and
+ * SlpTypeEn gets set by the SMU. Function does not return if successful.
*/
void smu_sx_entry(void);