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authorEric Lai <ericr_lai@compal.corp-partner.google.com>2020-12-18 10:51:46 +0800
committerFelix Held <felix-coreboot@felixheld.de>2020-12-19 16:29:44 +0000
commit3b648baf03a97689528a18c16f498bd9c4eb1e21 (patch)
treea752b4fa69473f5ab195549dfbb5213ddf4bdef5 /src/soc/amd/picasso/fch.c
parentdd32e653cfd1c0a387c76301625fce2a6d9abdd2 (diff)
soc/amd/picasso: move sb_clk_output_48Mhz from acp to fch
Move sb_clk_output_48Mhz out of acp. It should be called unconditionally. We may have another device need this clock e.g. superio chip. BUG=b:174121847 BRANCH=zork TEST= build passed Signed-off-by: Eric Lai <ericr_lai@compal.corp-partner.google.com> Change-Id: I30ad6c60066f17cc83e7feb40675610f4853a022 Reviewed-on: https://review.coreboot.org/c/coreboot/+/48722 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/soc/amd/picasso/fch.c')
-rw-r--r--src/soc/amd/picasso/fch.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/soc/amd/picasso/fch.c b/src/soc/amd/picasso/fch.c
index 0fe176b21a..d5278cbd0f 100644
--- a/src/soc/amd/picasso/fch.c
+++ b/src/soc/amd/picasso/fch.c
@@ -237,6 +237,8 @@ void southbridge_init(void *chip_info)
al2ahb_clock_gate();
gpp_clk_setup();
+
+ sb_clk_output_48Mhz();
}
void southbridge_final(void *chip_info)