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authorDerek Huang <derek.huang@intel.corp-partner.google.com>2021-03-15 12:11:19 +0800
committerPatrick Georgi <pgeorgi@google.com>2021-03-19 11:22:07 +0000
commit8056187e4eccd3fc56390498deb692cc16eacc9e (patch)
treea5ceb6545f45db3f97587475e6fbae4ae132fcc9 /src/soc/amd/picasso/fch.c
parent9e82bf36c82159330f75a5fba6bb4c5ef37940fd (diff)
soc/intel/tgl: Add configurable value for PmcUsb2PhySusPgEnable
PmcUsb2PhySusPgEnable is enabled by default. Expose devicetree parameter to disable Signed-off-by: Derek Huang <derek.huang@intel.corp-partner.google.com> Change-Id: Ibd54a10c57d39bb8762b705ef0d6ff4cd47f0d89 Reviewed-on: https://review.coreboot.org/c/coreboot/+/51490 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
Diffstat (limited to 'src/soc/amd/picasso/fch.c')
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