diff options
| author | Aaron Durbin <adurbin@chromium.org> | 2020-04-11 10:06:37 -0600 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2020-05-01 23:28:37 +0000 |
| commit | 806ea463dbc20c9a577923af51e9976baaf6790a (patch) | |
| tree | e6f16749a1665aeeec900b1e0018fb6d34e77307 /src/soc/amd/picasso/chip.h | |
| parent | 00a220877c8fc27f161017e68b67fce23117c0ad (diff) | |
soc/amd/picasso: add sd/emmc0 configuration to chip.h
In order to isolate mainboard code from direct FSPS manipulation
allow sd/emmc0 configuration to be supplied by devicetree.cb.
BUG=b:153502861
Change-Id: I2569ccccd638faaf2c9ac68fe582ecb9fa967d9f
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/third_party/coreboot/+/2146439
Commit-Queue: Aaron Durbin <adurbin@google.com>
Tested-by: Aaron Durbin <adurbin@google.com>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40876
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/soc/amd/picasso/chip.h')
| -rw-r--r-- | src/soc/amd/picasso/chip.h | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/src/soc/amd/picasso/chip.h b/src/soc/amd/picasso/chip.h index edb1b69bb0..7c6823239c 100644 --- a/src/soc/amd/picasso/chip.h +++ b/src/soc/amd/picasso/chip.h @@ -86,6 +86,21 @@ struct soc_amd_picasso_config { enum spi100_speed spi_fast_speed; enum spi100_speed spi_altio_speed; enum spi100_speed spi_tpm_speed; + + enum { + SD_EMMC_DISABLE, + SD_EMMC_SD_LOW_SPEED, + SD_EMMC_SD_HIGH_SPEED, + SD_EMMC_SD_UHS_I_SDR_50, + SD_EMMC_SD_UHS_I_DDR_50, + SD_EMMC_SD_UHS_I_SDR_104, + SD_EMMC_EMMC_SDR_26, + SD_EMMC_EMMC_SDR_52, + SD_EMMC_EMMC_DDR_52, + SD_EMMC_EMMC_HS200, + SD_EMMC_EMMC_HS400, + SD_EMMC_EMMC_HS300, + } sd_emmc_config; }; typedef struct soc_amd_picasso_config config_t; |