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| author | Marshall Dawson <marshalldawson3rd@gmail.com> | 2019-06-11 12:18:20 -0600 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2019-07-03 21:30:16 +0000 |
| commit | bc4c903c1f0bbf5297309082f31cfc2f70addb99 (patch) | |
| tree | 99924f3d876aad0b7d56dfd974ece168c5028c9f /src/soc/amd/picasso/chip.h | |
| parent | 30cf1551683810504f7823e42d4cb6515459cff8 (diff) | |
soc/amd/picasso: Change all remaining soc names
Convert all remaining stoneyridge names to picasso.
Change-Id: I0ed3eaa5b1d2696448ae18b62c7218de59c61883
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33749
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Richard Spiegel <richard.spiegel@silverbackltd.com>
Diffstat (limited to 'src/soc/amd/picasso/chip.h')
| -rw-r--r-- | src/soc/amd/picasso/chip.h | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/soc/amd/picasso/chip.h b/src/soc/amd/picasso/chip.h index 4f241e7b6b..ff9c845898 100644 --- a/src/soc/amd/picasso/chip.h +++ b/src/soc/amd/picasso/chip.h @@ -27,9 +27,9 @@ #define MAX_DRAM_CH 1 #define MAX_DIMMS_PER_CH 2 -#define STONEY_I2C_DEV_MAX 4 +#define PICASSO_I2C_DEV_MAX 4 -struct soc_amd_stoneyridge_config { +struct soc_amd_picasso_config { u8 spd_addr_lookup[MAX_NODES][MAX_DRAM_CH][MAX_DIMMS_PER_CH]; enum { DRAM_CONTENTS_KEEP, @@ -59,7 +59,7 @@ struct soc_amd_stoneyridge_config { * register i2c_scl_reset = (GPIO_I2C0_SCL | GPIO_I2C3_SCL) */ u8 i2c_scl_reset; - struct dw_i2c_bus_config i2c[STONEY_I2C_DEV_MAX]; + struct dw_i2c_bus_config i2c[PICASSO_I2C_DEV_MAX]; u8 stapm_percent; u32 stapm_time_ms; u32 stapm_power_mw; @@ -74,7 +74,7 @@ struct soc_amd_stoneyridge_config { u8 lvds_poseq_blon_to_varybl; }; -typedef struct soc_amd_stoneyridge_config config_t; +typedef struct soc_amd_picasso_config config_t; extern struct device_operations pci_domain_ops; |