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authorFelix Held <felix-coreboot@felixheld.de>2024-01-26 14:05:58 +0100
committerFelix Held <felix-coreboot@felixheld.de>2024-01-27 16:37:36 +0000
commit1b410d9ab98b084ab90d012a2ae80c25b1b0a544 (patch)
tree5bc871805138eeaabe0b39745f18a0570ea63df0 /src/soc/amd/picasso/chip.c
parent545c532902a8a11a7c79d220f353a2da544d00f0 (diff)
soc/amd: rename agesa_write_acpi_tables to soc_acpi_write_tables
It's not the AGESA code that generates most of the ACPI tables, so rename the function. This also aligns the other SoCs more with Genoa. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I6b2e6c4cb7139c8bde01b4440ab2e923a1086827 Reviewed-on: https://review.coreboot.org/c/coreboot/+/80217 Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/amd/picasso/chip.c')
-rw-r--r--src/soc/amd/picasso/chip.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/amd/picasso/chip.c b/src/soc/amd/picasso/chip.c
index 4ddfa56c08..45b4ca2a6d 100644
--- a/src/soc/amd/picasso/chip.c
+++ b/src/soc/amd/picasso/chip.c
@@ -36,7 +36,7 @@ struct device_operations picasso_pci_domain_ops = {
static void soc_init(void *chip_info)
{
- default_dev_ops_root.write_acpi_tables = agesa_write_acpi_tables;
+ default_dev_ops_root.write_acpi_tables = soc_acpi_write_tables;
amd_fsp_silicon_init();