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authorTim Van Patten <timvp@google.com>2022-08-23 16:06:33 -0600
committerFelix Held <felix-coreboot@felixheld.de>2022-09-12 12:21:01 +0000
commit9244358536aaecff29453b1693fdf202091878ef (patch)
tree4b8136239b03292ffb6d6171af19ca3343a36acf /src/soc/amd/picasso/acpi
parent14bed61ba160093003613fc210b3e6b7af15d964 (diff)
soc/amd: Refactor DPTC Tablet Mode
Refactor AMD DPTC tablet mode in preparation for adding low/no battery DPTC settings. 1. Refactor and simplify acpigen_write_alib_dptc() into the following functions: - acpigen_write_alib_dptc_default() - acpigen_write_alib_dptc_tablet() 2. Add device tree register value dptc_tablet_mode_enable to control whether DPTC tablet mode is enabled for a variant. 3. Add dptc.asl to perform the necessary ACPI checking before modifying the DPTC settings. BRANCH=none BUG=b:217911928 TEST=Build zork TEST=Build nipperkin TEST=Boot skyrim Change-Id: I2518fdd526868c9d5668a6018fd3570392e809c0 Signed-off-by: Tim Van Patten <timvp@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/66994 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Diffstat (limited to 'src/soc/amd/picasso/acpi')
-rw-r--r--src/soc/amd/picasso/acpi/soc.asl2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/soc/amd/picasso/acpi/soc.asl b/src/soc/amd/picasso/acpi/soc.asl
index e8c78e1d19..d9d40c7f65 100644
--- a/src/soc/amd/picasso/acpi/soc.asl
+++ b/src/soc/amd/picasso/acpi/soc.asl
@@ -16,3 +16,5 @@ Device(PCI0) {
/* Add GPIO library */
#include <soc/amd/common/acpi/gpio_bank_lib.asl>
+
+#include <soc/amd/common/acpi/dptc.asl>