diff options
author | Raul E Rangel <rrangel@chromium.org> | 2020-07-13 16:10:34 -0600 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2020-07-15 08:38:43 +0000 |
commit | 742abd3daf6be57de2df5002b8985ad36884c959 (patch) | |
tree | cdfae09c0acf514a7b26c5256742e88f32ed281e /src/soc/amd/picasso/acpi/pci_int.asl | |
parent | 1aa5cff70908a18b1bd0fd41b2e2ad7014cf9813 (diff) |
soc/amd/picasso/acpi: Delete unused and invalid OperationRegions
0xc50, 0xc52, 0xc6f don't exist on Picasso. The PCI config space
registers define SATA and OHCI which are at the wrong bus locations.
I just remove the whole section since it's not used. We never access the
PCIe Error region, or the PM2 region either.
BUG=b:153001807, b:154756391
TEST=Build Trembyle
Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Change-Id: I98aee09770f1df9f553c94580c1ee00c06a9cec1
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43427
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/soc/amd/picasso/acpi/pci_int.asl')
-rw-r--r-- | src/soc/amd/picasso/acpi/pci_int.asl | 103 |
1 files changed, 0 insertions, 103 deletions
diff --git a/src/soc/amd/picasso/acpi/pci_int.asl b/src/soc/amd/picasso/acpi/pci_int.asl index bd72b22b47..1f7951d6d2 100644 --- a/src/soc/amd/picasso/acpi/pci_int.asl +++ b/src/soc/amd/picasso/acpi/pci_int.asl @@ -1,108 +1,5 @@ /* SPDX-License-Identifier: GPL-2.0-only */ - /* PCIe Configuration Space for CONFIG_MMCONF_BUS_NUMBER busses */ - OperationRegion(PCFG, SystemMemory, PCBA, PCLN) /* Each bus consumes 1MB */ - Field(PCFG, ByteAcc, NoLock, Preserve) { - /* Byte offsets are computed using the following technique: - * ((bus number + 1) * ((device number * 8) * 4096)) + register offset - * The 8 comes from 8 functions per device, and 4096 bytes per function config space - */ - Offset(0x00088024), /* Byte offset to SATA register 24h - Bus 0, Device 17, Function 0 */ - STB5, 32, - Offset(0x00098042), /* Byte offset to OHCI0 register 42h - Bus 0, Device 19, Function 0 */ - PT0D, 1, - PT1D, 1, - PT2D, 1, - PT3D, 1, - PT4D, 1, - PT5D, 1, - PT6D, 1, - PT7D, 1, - PT8D, 1, - PT9D, 1, - Offset(0x000a0004), /* Byte offset to SMBUS register 4h - Bus 0, Device 20, Function 0 */ - SBIE, 1, - SBME, 1, - Offset(0x000a0008), /* Byte offset to SMBUS register 8h - Bus 0, Device 20, Function 0 */ - SBRI, 8, - Offset(0x000a0014), /* Byte offset to SMBUS register 14h - Bus 0, Device 20, Function 0 */ - SBB1, 32, - Offset(0x000a0078), /* Byte offset to SMBUS register 78h - Bus 0, Device 20, Function 0 */ - ,14, - P92E, 1, /* Port92 decode enable */ - } - - OperationRegion(SB5, SystemMemory, STB5, 0x1000) - Field(SB5, AnyAcc, NoLock, Preserve){ - /* Port 0 */ - Offset(0x120), /* Port 0 Task file status */ - P0ER, 1, - , 2, - P0DQ, 1, - , 3, - P0BY, 1, - Offset(0x128), /* Port 0 Serial ATA status */ - P0DD, 4, - , 4, - P0IS, 4, - Offset(0x12c), /* Port 0 Serial ATA control */ - P0DI, 4, - Offset(0x130), /* Port 0 Serial ATA error */ - , 16, - P0PR, 1, - - /* Port 1 */ - offset(0x1a0), /* Port 1 Task file status */ - P1ER, 1, - , 2, - P1DQ, 1, - , 3, - P1BY, 1, - Offset(0x1a8), /* Port 1 Serial ATA status */ - P1DD, 4, - , 4, - P1IS, 4, - Offset(0x1ac), /* Port 1 Serial ATA control */ - P1DI, 4, - Offset(0x1b0), /* Port 1 Serial ATA error */ - , 16, - P1PR, 1, - - /* Port 2 */ - Offset(0x220), /* Port 2 Task file status */ - P2ER, 1, - , 2, - P2DQ, 1, - , 3, - P2BY, 1, - Offset(0x228), /* Port 2 Serial ATA status */ - P2DD, 4, - , 4, - P2IS, 4, - Offset(0x22c), /* Port 2 Serial ATA control */ - P2DI, 4, - Offset(0x230), /* Port 2 Serial ATA error */ - , 16, - P2PR, 1, - - /* Port 3 */ - Offset(0x2a0), /* Port 3 Task file status */ - P3ER, 1, - , 2, - P3DQ, 1, - , 3, - P3BY, 1, - Offset(0x2a8), /* Port 3 Serial ATA status */ - P3DD, 4, - , 4, - P3IS, 4, - Offset(0x2aC), /* Port 3 Serial ATA control */ - P3DI, 4, - Offset(0x2b0), /* Port 3 Serial ATA error */ - , 16, - P3PR, 1, - } - Method(\_PIC, 0x01, NotSerialized) { If (Arg0) |