diff options
| author | Marshall Dawson <marshalldawson3rd@gmail.com> | 2020-09-04 12:07:27 -0600 |
|---|---|---|
| committer | Marshall Dawson <marshalldawson3rd@gmail.com> | 2020-09-10 12:37:45 +0000 |
| commit | 39c64b0bdd04a84bf206be5a94ceb1d685e9e1a8 (patch) | |
| tree | e8a475836ed5567c464edb026d6ca9ee48b4e48c /src/soc/amd/picasso/acpi.c | |
| parent | 39a8040ddc551306d823d52a459fdb5dd717b2fe (diff) | |
soc/amd/picasso: Assign IOAPIC IDs, GNB APIC base with FSP
Add Kconfig symbols for the FCH and GNB IOAPIC IDs, then pass
the info to FSP to keep it in sync with coreboot. Do the same
for the northbridge's IOAPIC base address.
Use the new values where needed, and reserve the resources
consumed by the GNB IOAPIC.
BUG=b:167421913, b:166519072
TEST=Boot Morphius and verify settings
BRANCH=Zork
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Change-Id: I57d3d6b2ebd8b5d511dbcb4324ea065cc3111a2d
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45115
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/amd/picasso/acpi.c')
| -rw-r--r-- | src/soc/amd/picasso/acpi.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/soc/amd/picasso/acpi.c b/src/soc/amd/picasso/acpi.c index 1b9c0cafa4..84be4bdd6a 100644 --- a/src/soc/amd/picasso/acpi.c +++ b/src/soc/amd/picasso/acpi.c @@ -49,9 +49,9 @@ unsigned long acpi_fill_madt(unsigned long current) /* create all subtables for processors */ current = acpi_create_madt_lapics(current); - /* Write Kern IOAPIC, only one */ + /* Write IOAPIC, only one */ current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *)current, - CONFIG_MAX_CPUS, IO_APIC_ADDR, 0); + CONFIG_PICASSO_FCH_IOAPIC_ID, IO_APIC_ADDR, 0); /* 0: mean bus 0--->ISA */ /* 0: PIC 0 */ |