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authorAamir Bohra <aamir.bohra@intel.com>2020-04-22 20:46:15 +0530
committerFurquan Shaikh <furquan@google.com>2020-05-11 06:23:33 +0000
commitbc41ccf12c393649a5b274c436f9cf62e71d12c3 (patch)
treeef1b5fad3510bf5daa7b538a4d3c93e1e91921e2 /src/soc/amd/picasso/acpi.c
parent137c5c475980a660f4968f231b0f8a62f30575b1 (diff)
soc/intel/jasperlake: Enable end of post support in FSP
Send end of post message to CSME in FSP, by selecting EndOfPost message in PEI phase. In API mode which coreboot currently uses, sending EndOfPost message in DXE phase is not applicable. Change-Id: Ie21dcfc84d331f036090d01ea3e3925b81eea902 Signed-off-by: Aamir Bohra <aamir.bohra@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/40612 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Diffstat (limited to 'src/soc/amd/picasso/acpi.c')
0 files changed, 0 insertions, 0 deletions