diff options
author | Felix Held <felix-coreboot@felixheld.de> | 2021-02-11 04:57:50 +0100 |
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committer | Felix Held <felix-coreboot@felixheld.de> | 2021-02-12 14:39:09 +0000 |
commit | ec54445cd4f2ac2337091e7201680ba38b988cd0 (patch) | |
tree | 5504c0d39ec7d15be6989688a2b22295b33a16d3 /src/soc/amd/picasso/Makefile.inc | |
parent | 007cf382f887b11239aff88ed469ffbdd10bd701 (diff) |
soc/amd/picasso/psp: move to common code and rename to psp_smm_gen2
Change-Id: I771a7d36eea7307754386824190624a09c0e38f7
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50515
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Diffstat (limited to 'src/soc/amd/picasso/Makefile.inc')
-rw-r--r-- | src/soc/amd/picasso/Makefile.inc | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/src/soc/amd/picasso/Makefile.inc b/src/soc/amd/picasso/Makefile.inc index d81eddc59d..e92de1f588 100644 --- a/src/soc/amd/picasso/Makefile.inc +++ b/src/soc/amd/picasso/Makefile.inc @@ -25,7 +25,6 @@ romstage-y += gpio.c romstage-y += reset.c romstage-y += memmap.c romstage-y += uart.c -romstage-y += psp.c romstage-y += mrc_cache.c verstage-y += i2c.c @@ -50,7 +49,6 @@ ramstage-y += memmap.c ramstage-y += uart.c ramstage-y += finalize.c ramstage-y += soc_util.c -ramstage-y += psp.c ramstage-y += fsp_params.c ramstage-y += update_microcode.c ramstage-y += graphics.c @@ -63,7 +61,6 @@ ifeq ($(CONFIG_DEBUG_SMI),y) smm-y += uart.c endif smm-y += gpio.c -smm-y += psp.c smm-y += smu.c CPPFLAGS_common += -I$(src)/soc/amd/picasso |