diff options
author | Felix Held <felix-coreboot@felixheld.de> | 2020-12-09 16:25:18 +0100 |
---|---|---|
committer | Felix Held <felix-coreboot@felixheld.de> | 2020-12-11 00:42:32 +0000 |
commit | 0dfaf33a1331ede41c052be20217abcf2b70e141 (patch) | |
tree | ed9b05541a01a7763debb1d63c93c337a2e0c9f9 /src/soc/amd/picasso/Makefile.inc | |
parent | e7a0202ed04db7aa5033e659345ccc75c3bc0773 (diff) |
soc/amd/picasso: rename PICASSO_CONSOLE_UART to AMD_SOC_CONSOLE_UART
This allows factoring out the common initialization for the integrated
UARTs.
Change-Id: I7399a13b9280b732086c6f8e6dfd9f1207d8c8ff
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48508
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/amd/picasso/Makefile.inc')
-rw-r--r-- | src/soc/amd/picasso/Makefile.inc | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/src/soc/amd/picasso/Makefile.inc b/src/soc/amd/picasso/Makefile.inc index 142fb0c1f0..53b8c8da74 100644 --- a/src/soc/amd/picasso/Makefile.inc +++ b/src/soc/amd/picasso/Makefile.inc @@ -17,7 +17,7 @@ bootblock-y += bootblock.c bootblock-y += early_fch.c bootblock-y += i2c.c bootblock-y += uart.c -bootblock-$(CONFIG_PICASSO_CONSOLE_UART) += uart_console.c +bootblock-$(CONFIG_AMD_SOC_CONSOLE_UART) += uart_console.c bootblock-y += gpio.c bootblock-y += reset.c @@ -27,14 +27,14 @@ romstage-y += gpio.c romstage-y += reset.c romstage-y += memmap.c romstage-y += uart.c -romstage-$(CONFIG_PICASSO_CONSOLE_UART) += uart_console.c +romstage-$(CONFIG_AMD_SOC_CONSOLE_UART) += uart_console.c romstage-y += psp.c romstage-y += mrc_cache.c verstage-y += i2c.c verstage_x86-y += gpio.c verstage_x86-y += uart.c -verstage_x86-$(CONFIG_PICASSO_CONSOLE_UART) += uart_console.c +verstage_x86-$(CONFIG_AMD_SOC_CONSOLE_UART) += uart_console.c verstage_x86-y += reset.c ramstage-y += i2c.c @@ -53,7 +53,7 @@ ramstage-y += sata.c ramstage-y += memmap.c ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smi.c ramstage-y += uart.c -ramstage-$(CONFIG_PICASSO_CONSOLE_UART) += uart_console.c +ramstage-$(CONFIG_AMD_SOC_CONSOLE_UART) += uart_console.c ramstage-y += finalize.c ramstage-y += soc_util.c ramstage-y += psp.c @@ -67,7 +67,7 @@ ramstage-y += dmi.c smm-y += smihandler.c ifeq ($(CONFIG_DEBUG_SMI),y) smm-y += uart.c -smm-$(CONFIG_PICASSO_CONSOLE_UART) += uart_console.c +smm-$(CONFIG_AMD_SOC_CONSOLE_UART) += uart_console.c endif smm-y += gpio.c smm-y += psp.c |